Sauvagya Ranjan Sahoo

Banee Bandana Das

Saraju P. Mohanty

ACM J. Emerg. Technol. Comput. Syst., April, 2023

2021

Eternal-Thing: A Secure Aging-Aware Solar-Energy Harvester Thing for Sustainable IoT.

[BibT_eX]

[DOI]

Banee Bandana Das

Saraju P. Mohanty

IEEE Trans. Sustain. Comput., 2021

Eternal-Thing 2.0: Analog-Trojan Resilient Ripple-Less Solar Energy Harvesting System for Sustainable IoT in Smart Cities and Smart Villages.

[BibT_eX]

[DOI]

Banee Bandana Das

Saraju P. Mohanty

CoRR, 2021

2020

A novel area efficient on-chip RO-Sensor for recycled IC detection.

[BibT_eX]

[DOI]

Integr., 2020

2019

Physical Unclonable Functions for On-Chip Instrumentation: Enhancing the Security of the Internal Joint Test Action Group Network.

[BibT_eX]

[DOI]

Naini Satheesh

IEEE Consumer Electron. Mag., 2019

2018

A novel configurable ring oscillator PUF with improved reliability using reduced supply voltage.

[BibT_eX]

[DOI]

Microprocess. Microsystems, 2018

PUF-Based Secure Test Wrapper for SoC Testing.

[BibT_eX]

[DOI]

Saurabh Seth

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Run Time Mitigation of Performance Degradation Hardware Trojan Attacks in Network on Chip.

[BibT_eX]

[DOI]

Manoj Kumar JYV

Proceedings of the 2018 IEEE Computer Society Annual Symposium on VLSI, 2018

Energy Efficient Ultra Low Power Solar Harvesting System Design with MPPT for IOT Edge Node Devices.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2018

A Novel Holistic Security Framework for In-Field Firmware Updates.

[BibT_eX]

[DOI]

Krishna Kiran

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2018

2017

A novel current controlled configurable RO PUF with improved security metrics.

[BibT_eX]

[DOI]

Integr., 2017

Secure split test techniques to prevent IC piracy for IoT devices.

[BibT_eX]

[DOI]

G. Hanumanta Rao

Integr., 2017

A Flexible Pay-per-Device Licensing Scheme for FPGA IP Cores.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

Analysis of Side-Channel Attack AES Hardware Trojan Benchmarks against Countermeasures.

[BibT_eX]

[DOI]

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

On-chip RO-Sensor for Recycled IC Detection.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017

Microprocessor Based Physical Unclonable Function.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017

Security Enhancements to System on Chip Devices for IoT Perception Layer.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2017

2016

A Modified RO-PUF with Improved Security Metrics on FPGA.

[BibT_eX]

[DOI]

Naini Satheesh

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

A Novel Aging Tolerant RO-PUF for Low Power Application.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

Securing IEEE 1687 Standard On-chip Instrumentation Access Using PUF.

[BibT_eX]

[DOI]

Naini Satheesh

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2016

2015

A novel ROPUF for hardware security.

[BibT_eX]

[DOI]

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

An improved AES Hardware Trojan benchmark to validate Trojan detection schemes in an ASIC design flow.

[BibT_eX]

[DOI]

Rakesh Chanamala

Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

A Modified Configurable RO PUF with Improved Security Metrics.

[BibT_eX]

[DOI]

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2015

A Novel PUF Based SST to Prevent Distribution of Rejected ICs from Untrusted Assembly.

[BibT_eX]

[DOI]

G. Hanumantha Rao

Proceedings of the IEEE International Symposium on Nanoelectronic and Information Systems, 2015

2012

Design of Combinational and Sequential Circuits Using Novel Feedthrough Logic.

[BibT_eX]

[DOI]

Proceedings of the Progress in VLSI Design and Test - 16th International Symposium, 2012

An improved feedthrough logic for low power circuit design.

[BibT_eX]

[DOI]