Séamas McGettrick

According to our database1, Séamas McGettrick authored at least 19 papers between 2007 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2017
Technologies and architectures to enable SDN in converged 5G/optical access networks.
Proceedings of the 2017 International Conference on Optical Network Design and Modeling, 2017

Multi-service SDN controlled reconfigurable long-reach optical access network.
Proceedings of the 2017 European Conference on Networks and Communications, 2017

2016
Demonstration of SDN enabled dynamically reconfigurable high capacity optical access for converged services.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2016

2015
A Split MAC Approach for SDR Platforms.
IEEE Trans. Computers, 2015

Independent Transient Plane Design for Protection in OpenFlow-Based Networks.
JOCN, 2015

Experimental end-to-end demonstration of shared N: 1 dual homed protection in long reach PON and SDN-controlled core.
Proceedings of the Optical Fiber Communications Conference and Exhibition, 2015

2014
Postcards from the near Future: Towards communicating communications.
Proceedings of the 2014 IEEE Global Engineering Education Conference, 2014

Design and experimental test of 1: 1 end-to-end protection for LR-PON using an SDN multi-tier control plane.
Proceedings of the European Conference on Optical Communication, 2014

2013
Improving hardware protection switching in 10Gb/s symmetric Long Reach PONs.
Proceedings of the 2013 Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC), 2013

A split architecture for random access MAC for SDR platforms.
Proceedings of the 8th International Conference on Cognitive Radio Oriented Wireless Networks, 2013

2011
Rapid functional modelling and simulation of coarse grained reconfigurable array architectures.
J. Syst. Archit., 2011

Area-delay efficient arithmetic Mixed-Radix Conversion for Fermat moduli.
IEICE Electron. Express, 2011

SYSCORE: A Coarse Grained Reconfigurable Array Architecture for Low Energy Biosignal Processing.
Proceedings of the IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines, 2011

High Performance Programmable FPGA Overlay for Digital Signal Processing.
Proceedings of the Reconfigurable Computing: Architectures, Tools and Applications, 2011

2010
Hardware Computation of the PageRank Eigenvector.
Proceedings of the ReConFig'10: 2010 International Conference on Reconfigurable Computing and FPGAs, 2010

2008
An FPGA architecture for the Pagerank eigenvector problem.
Proceedings of the FPL 2008, 2008

2007
Towards an FPGA Solver for the PageRank Eigenvector Problem.
Proceedings of the Parallel Computing: Architectures, 2007

FPGA based Sparse Matrix Vector Multiplication using Commodity DRAM Memory.
Proceedings of the FPL 2007, 2007

Searching the Web with an FPGA Based Search Engine.
Proceedings of the Reconfigurable Computing: Architectures, 2007


  Loading...