David Moloney

According to our database1, David Moloney authored at least 49 papers between 1995 and 2021.

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Bibliography

2021
Improving Performance-Power-Programmability in Space Avionics with Edge Devices: VBN on Myriad2 SoC.
ACM Trans. Embed. Comput. Syst., 2021

Leveraging Deep Learning for Visual Odometry Using Optical Flow.
Sensors, 2021

2020
Tree Annotations in LiDAR Data Using Point Densities and Convolutional Neural Networks.
IEEE Trans. Geosci. Remote. Sens., 2020

Efficient Star Identification Using a Neural Network.
Sensors, 2020

A Survey of Lost-in-Space Star Identification Algorithms Since 2009.
Sensors, 2020

1.2 Watt Classification of 3D Voxel Based Point-clouds using a CNN on a Neural Compute Stick.
Neurocomputing, 2020

A Ray-Casting Accelerator in 10nm CMOS for Efficient 3D Scene Reconstruction in Edge Robotics and Augmented Reality Applications.
Proceedings of the IEEE Symposium on VLSI Circuits, 2020

2019
Size/Accuracy Trade-Off in Convolutional Neural Networks: An Evolutionary Approach.
Proceedings of the Recent Advances in Big Data and Deep Learning, 2019

2018
Smart Doll: Emotion Recognition Using Embedded Deep Learning.
Symmetry, 2018

It All Matters: Reporting Accuracy, Inference Time and Power Consumption for Face Emotion Recognition on Embedded Systems.
CoRR, 2018

Exploring the Vision Processing Unit as Co-Processor for Inference.
Proceedings of the 2018 IEEE International Parallel and Distributed Processing Symposium Workshops, 2018

Automatic Tree Annotation in LiDAR Data.
Proceedings of the 4th International Conference on Geographical Information Systems Theory, 2018

VOLA: A Compact Volumetric Format for 3D Mapping and Embedded Systems.
Proceedings of the 4th International Conference on Geographical Information Systems Theory, 2018

Investigating the Use of Primes in Hashing for Volumetric Data.
Proceedings of the 4th International Conference on Geographical Information Systems Theory, 2018

Digital Scene Augmentation Techniques for Generating Photo-Realistic Virtual Crowds.
Proceedings of the IEEE Games, Entertainment, Media Conference, 2018

Investigating the Impact of Suboptimal Hashing Functions.
Proceedings of the IEEE Games, Entertainment, Media Conference, 2018

Efficient winograd-based convolution kernel implementation on edge devices.
Proceedings of the 55th Annual Design Automation Conference, 2018

2017
Eyes of Things.
Sensors, 2017

Face detection speed improvement using bitmap-based Histogram of Oriented gradien.
Proceedings of the International Conference on Systems, Signals and Image Processing, 2017

Fully convolutional denoising autoencoder for 3D scene reconstruction from a single depth image.
Proceedings of the 4th International Conference on Systems and Informatics, 2017

Evaluation of synthetic data for deep learning stereo depth algorithms on embedded platforms.
Proceedings of the 4th International Conference on Systems and Informatics, 2017

Classify 3D voxel based point-cloud using convolutional neural network on a neural compute stick.
Proceedings of the 13th International Conference on Natural Computation, 2017

Applications of the VOLA format for 3D data knowledge discovery.
Proceedings of the 13th International Conference on Natural Computation, 2017

Scene Reconstruction from a Single Depth Image Using 3D CNN.
Proceedings of the 2017 International Conference on Computational Biology and Bioinformatics, 2017


Convolutional neural network on neural compute stick for voxelized point-clouds classification.
Proceedings of the 10th International Congress on Image and Signal Processing, 2017

2016
Convolutional Neural Network for 3D object recognition using volumetric representation.
Proceedings of the First International Workshop on Sensing, 2016

Object recognition speed improvement using BITMAP-HoG.
Proceedings of the 2016 IEEE International Conference on Image Processing, 2016

Passive dense stereo vision on the Myriad2 VPU.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

Embedded deep neural networks: "The cost of everything and the value of nothing".
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

HW acceleration for volumetric applications.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

MvEcho.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

MvEcho - acoustic response modelling for auralisation.
Proceedings of the 2016 IEEE Hot Chips 28 Symposium (HCS), 2016

3D Object Recognition Based on Volumetric Representation Using Convolutional Neural Networks.
Proceedings of the Articulated Motion and Deformable Objects, 2016

2015
Always-on Vision Processing Unit for Mobile Applications.
IEEE Micro, 2015

A Vision for the Future [Soapbox].
IEEE Consumer Electron. Mag., 2015

Mixed-length SIMD code generation for VLIW architectures with multiple native vector-widths.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014
An improved interest point matching algorithm for human body tracking.
Proceedings of the International Image Processing, 2014

Precision refinement for media-processor SoCs: fp32 -> fp64 on myriad.
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

Level-3 BLAS on myriad multi-core media-processor SoC.
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

Myriad 2: Eye of the computational vision storm.
Proceedings of the 2014 IEEE Hot Chips 26 Symposium (HCS), 2014

2011
PEPPHER: Efficient and Productive Usage of Hybrid Computing Systems.
IEEE Micro, 2011

The PEPPHER Approach to Programmability and Performance Portability for Heterogeneous many-core Architectures.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

1TOPS/W software programmable media processor.
Proceedings of the 2011 IEEE Hot Chips 23 Symposium (HCS), 2011

2007
FPGA based Sparse Matrix Vector Multiplication using Commodity DRAM Memory.
Proceedings of the FPL 2007, 2007

2005
Streaming Sparse Matrix Compression/Decompression.
Proceedings of the High Performance Embedded Architectures and Compilers, 2005

2000
Aliasing-Free Space and Time Compactions with Limited Overhead.
Proceedings of the 1st International Symposium on Quality of Electronic Design (ISQED 2000), 2000

1998
Low-power 200-Msps, area-efficient, five-tap programmable FIR filter [in BiCMOS].
IEEE J. Solid State Circuits, 1998

1995
A single-chip 9-32 mb/s read/write channel for disk-drive applications.
IEEE J. Solid State Circuits, June, 1995


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