Sebastian Panenka

According to our database1, Sebastian Panenka authored at least 1 paper in 2002.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2002
Efficiency of dual supply voltage logic synthesis for low power in consideration of varying delay constraint strictness.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002


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