Walter Stechele

According to our database1, Walter Stechele authored at least 121 papers between 1997 and 2020.

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Bibliography

2020
Binary DAD-Net: Binarized Driveable Area Detection Network for Autonomous Driving.
Proceedings of the 2020 IEEE International Conference on Robotics and Automation, 2020

OrthrusPE: Runtime Reconfigurable Processing Elements for Binary Neural Networks.
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020

ALF: Autoencoder-based Low-rank Filter-sharing for Efficient Convolutional Neural Networks.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

2019
Mixed Frame-/Event-Driven Fast Pedestrian Detection.
Proceedings of the International Conference on Robotics and Automation, 2019

Deep Grid Fusion of Feature-Level Sensor Data with Convolutional Neural Networks.
Proceedings of the 2019 IEEE International Conference on Connected Vehicles and Expo, 2019

LCS-based automatic configuration of approximate computing parameters for FPGA system designs.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019

DSC: Dense-Sparse Convolution for Vectorized Inference of Convolutional Neural Networks.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019

Resource-Aware Optimization of DNNs for Embedded Applications.
Proceedings of the 16th Conference on Computer and Robot Vision, 2019

An Efficient FPGA Accelerator Design for Optimized CNNs Using OpenCL.
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019

Resource-Aware Parameter Tuning for Real-Time Applications.
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019

2018
Efficient hardware acceleration of CNNs using logarithmic data representation with arbitrary log-base.
Proceedings of the International Conference on Computer-Aided Design, 2018

2017
Random Finite Set Based Bayesian Filtering with OpenCL in a Heterogeneous Platform.
Sensors, 2017

Online Multi-object Tracking-by-Clustering for Intelligent Transportation System with Neuromorphic Vision Sensor.
Proceedings of the KI 2017: Advances in Artificial Intelligence, 2017

Hardware-accelerated CCD readout smear correction for Fast Solar Polarimeter.
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017

2016
Invasive computing for timing-predictable stream processing on MPSoCs.
it Inf. Technol., 2016

Adaptive tracking of people and vehicles using mobile platforms.
EURASIP J. Adv. Signal Process., 2016

Integrated Soft Error Resilience and Self-Test.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

Tackling long duration transients in sequential logic.
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016

A Chip-level Redundant Threading (CRT) scheme for shared-memory protection.
Proceedings of the International Conference on High Performance Computing & Simulation, 2016

Preface.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016

Voltage over-scaling in sequential circuits for approximate computing.
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016

Special session 1 automotive parallel computing challenges - architectures, applications and tricks.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016

Prototyping real-time tracking systems on mobile devices.
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016

2015
Resource-awareness on heterogeneous MPSoCs for image processing.
J. Syst. Archit., 2015

Self-adaptive corner detection on MPSoC through resource-aware programming.
J. Syst. Archit., 2015

Self-reconfigurable control architecture for complex mobile robots.
it Inf. Technol., 2015

Protecting FPGA-based automotive systems against soft errors through reduced precision redundancy.
Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015

Improving wavelet denoising based on an in-depth analysis of the camera color processing.
Proceedings of the Real-Time Image and Video Processing 2015, 2015

Design of fine-grained sequential approximate circuits using probability-aware fault emulation.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015

Predictability of image processing algorithms on heterogeneous MPSoC.
Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015

Matching Detection and Correction Schemes for Soft Error Handling in Sequential Logic.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015

A soft-core processor array for relational operators.
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015

2014
Beyond Standard Noise Models: Evaluating Denoising Algorithms with Respect to Realistic Camera Noise.
Int. J. Semantic Comput., 2014

Resource-Aware Programming for Robotic Vision.
CoRR, 2014

Resource Prediction for Humanoid Robots.
CoRR, 2014

Automatic denoising parameter estimation using gradient histograms.
Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014

Improving the significance of probabilistic circuit fault emulations.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Towards low-cost fault detection strategy of FPGA configuration memory in real-time systems.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014

Self-adaptive harris corner detector on heterogeneous many-core processor.
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014

Resource-Aware Harris Corner Detection Based on Adaptive Pruning.
Proceedings of the Architecture of Computing Systems - ARCS 2014, 2014

Improving Efficiency of Embedded Multi-core Platforms with Scratchpad Memories.
Proceedings of the ARCS 2014, 2014

2013
Real-time motion detection based on SW/HW-codesign for walking rescue robots.
J. Real Time Image Process., 2013

Evaluation of hop count advantages of network-coded 2D-mesh NoCs.
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013

Towards an Evaluation of Denoising Algorithms with Respect to Realistic Camera Noise.
Proceedings of the 2013 IEEE International Symposium on Multimedia, 2013

RTL Simulation of High Performance Dynamic Reconfiguration: A Video Processing Case Study.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013

Potentials and Challenges for Multi-Core Processors in Robotic Applications.
Proceedings of the 43. Jahrestagung der Gesellschaft für Informatik, 2013

Self-reconfigurable Control Architecture for Complex Robots.
Proceedings of the 43. Jahrestagung der Gesellschaft für Informatik, 2013

A resource-efficient probabilistic fault simulator.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

Weighted partitioning of sequential processing chains for dynamically reconfigurable FPGAS.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013

A Design Space Exploration Framework For Automotive Embedded Systems And Their Power Management.
Proceedings of the 27th European Conference on Modelling and Simulation, 2013

FPGA Based Real-Time Data Processing DAQ System for the Mercury Imaging X-Ray Spectrometer.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

Dynamic Noise Estimation Approach for X-Ray Detectors on FPGAs.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

A resource-aware nearest-neighbor search algorithm for k-dimensional trees.
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013

Self-adaptation for Mobile Robot Algorithms Using Organic Computing Principles.
Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013

2012
An FPGA-based probability-aware fault simulator.
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012

Efficient DVB-T2 decoding accelerator design by time-multiplexing FPGA resources.
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012

A low-overhead monitoring ring interconnect for MPSoC parameter optimization.
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012

An evaluation on using GPU coprocessing for software radios on a low-cost platform.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

Partitioning and context switching for a reconfigurable FPGA-based DAB receiver.
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012

A Real-Time Capable Virtualized Information and Communication Technology Infrastructure for Automotive Systems.
Proceedings of the Advances in Real-Time Systems (to Georg Färber on the occasion of his appointment as Professor Emeritus at TU München after leading the Lehrstuhl für Realzeit-Computersysteme for 34 illustrious years)., 2012

Invasive Computing for robotic vision.
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012

Partial Reconfiguration on FPGAs in Practice - Tools and Applications.
Proceedings of the ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany, 2012

2011
Default Reasoning for Forensic Visual Surveillance based on Subjective Logic and Its Comparison with L-Fuzzy Set Based Approaches.
Int. J. Multim. Data Eng. Manag., 2011

Egomotion compensation and moving objects detection algorithm on GPU.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

A Model-Based Software Generation Approach Qualified for Heterogeneous GPGPU-Enabled Platforms.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011

A reasoning approach to enable abductive semantic explanation upon collected observations for forensic visual surveillance.
Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011

An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011

An approach to self-learning multicore reconfiguration management applied on Robotic Vision.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011

Applying ASoC to Multi-core Applications for Workload Management.
Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

Autonomic System on Chip Platform.
Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011

2010
Forensic reasoning upon pre-obtained surveillance metadata using uncertain spatio-temporal rules and subjective logic.
Proceedings of the 11th International Workshop on Image Analysis for Multimedia Interactive Services, 2010

Stereo Vision based Vehicle Detection.
Proceedings of the VISAPP 2010 - Proceedings of the Fifth International Conference on Computer Vision Theory and Applications, Angers, France, May 17-21, 2010, 2010

Subjective Logic Based Approach to Modeling Default Reasoning for Visual Surveillance.
Proceedings of the 4th IEEE International Conference on Semantic Computing (ICSC 2010), 2010

Towards Scalability and Reliability of Autonomic Systems on Chip.
Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2010

Architectural Vulnerability Factor Estimation with Backwards Analysis.
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010

A rapid prototyping system for error-resilient multi-processor systems-on-chip.
Proceedings of the Design, Automation and Test in Europe, 2010

Lessons Learned from last 4 Years of Reconfigurable Computing.
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010

Subjective Logic Based Hybrid Approach to Conditional Evidence Fusion for Forensic Visual Surveillance.
Proceedings of the Seventh IEEE International Conference on Advanced Video and Signal Based Surveillance, 2010

Towards Rapid Dynamic Partial Reconfiguration in Video-Based Driver Assistance Systems.
Proceedings of the Reconfigurable Computing: Architectures, 2010

AutoVision - Reconfigurable Hardware Acceleration for Video-Based Driver Assistance.
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010

2009
Wire Topology Optimization for Low Power CMOS.
IEEE Trans. Very Large Scale Integr. Syst., 2009

Toward contextual forensic retrieval for visual surveillance: Challenges and an architectural approach.
Proceedings of the 10th Workshop on Image Analysis for Multimedia Interactive Services, 2009

Segmentation Through Edge-linking - Segmentation for Video-based Driver Assistance Systems.
Proceedings of the IMAGAPP 2009, 2009

Optimizing the SUSAN corner detection algorithm for a high speed FPGA implementation.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009

2008
Luminance Correction in Stereo Correspondence Based Structure from Motion.
Proceedings of the Ninth International Workshop on Image Analysis for Multimedia Interactive Services, 2008

Learning Classifier Tables for Autonomic Systems on Chip.
Proceedings of the 38. Jahrestagung der Gesellschaft für Informatik, Beherrschbare Systeme, 2008

Workshop "Adaptive and Organic Systems".
Proceedings of the 38. Jahrestagung der Gesellschaft für Informatik, Beherrschbare Systeme, 2008

A multi-platform controller allowing for maximum Dynamic Partial Reconfiguration throughput.
Proceedings of the FPL 2008, 2008

A comparison of embedded reconfigurable video-processing architectures.
Proceedings of the FPL 2008, 2008


Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems.
Proceedings of the Design, Automation and Test in Europe, 2008

Hardware/software architecture of an algorithm for vision-based real-time vehicle detection in dark environments.
Proceedings of the Design, Automation and Test in Europe, 2008

Reconfigurable HW/SW Architecture of a Real-Time Driver Assistance System.
Proceedings of the Reconfigurable Computing: Architectures, 2008

2007
Autovision - A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision - Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme).
it Inf. Technol., 2007

A review of different object recognition methods for the application in driver assistance systems.
Proceedings of the Eighth International Workshop on Image Analysis for Multimedia Interactive Services, 2007

Physical Configuration On-Line Visualization of Xilinx Virtex-II FPGAs.
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007

A new framework to accelerate Virtex-II Pro dynamic partial self-reconfiguration.
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007

Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007

2006
Organic Computing at the System on Chip Level.
Proceedings of the IFIP VLSI-SoC 2006, 2006

Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs.
Proceedings of the Biologically Inspired Cooperative Computing, 2006

An Architecture for Runtime Evaluation of SoC Reliability.
Proceedings of the 36. Jahrestagung der Gesellschaft für Informatik, 2006

Multithreaded virtual-memory-enabled reconfigurable hardware accelerators.
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006

AutoVision: flexible processor architecture for video-assisted driving.
Proceedings of the Conference on Design, Automation and Test in Europe, 2006

Dynamically Reconfigurable Systems-on-Chip.
Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006

Combitgen: A new approach for creating partial bitstreams in Virtex-II Pro.
Proceedings of the ARCS 2006, 2006

2005
The Optimal Wire Order for Low Power CMOS.
Proceedings of the Integrated Circuit and System Design, 2005

Towards a Framework and a Design Methodology for Autonomic SoC.
Proceedings of the Second International Conference on Autonomic Computing (ICAC 2005), 2005

Optimization Potential of CMOS Power by Wire Spacing.
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005

Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization.
Proceedings of the 2005 Design, 2005

A Coprocessor for Accelerating Visual Information Processing.
Proceedings of the 2005 Design, 2005

Towards a Framework and a Design Methodology for Autonomous SoC.
Proceedings of the 18th International Conference on Architecture of Computing Systems, 2005

2004
Towards a Dynamically Reconfigurable System-on-Chip Platform for Video Signal Processing.
Proceedings of the ARCS 2004, 2004

2003
Performance Optimization of Color Segmentation Algorithms.
Proceedings of the Signal and Image Processing (SIP 2003), 2003

2002
Exploiting Metal Layer Characteristics for Low-Power Routing.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

Dual Supply Voltage Scaling in a Conventional Power-Driven Logic Synthesis Environment.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002

Novel modeling techniques for RTL power estimation.
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002

An MPEG-7 tool for compression and streaming of XML data.
Proceedings of the 2002 IEEE International Conference on Multimedia and Expo, 2002

MPEG-7 Binary Format for XML Dat.
Proceedings of the 2002 Data Compression Conference (DCC 2002), 2002

2000
A coprocessor architecture implementing the MPEG-4 visual core profile for mobile multimedia applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
A video segmentation algorithm for hierarchical object representations and its implementation.
IEEE Trans. Circuits Syst. Video Technol., 1999

1997
A flexible VLSI architecture for variable block size segment matching with luminance correction.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997


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