Walter Stechele
Orcid: 0000-0002-7455-8483
According to our database1,
Walter Stechele
authored at least 158 papers
between 1997 and 2024.
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Bibliography
2024
Wino Vidi Vici: Conquering Numerical Instability of 8-bit Winograd Convolution for Accurate Inference Acceleration on Edge.
Proceedings of the IEEE/CVF Winter Conference on Applications of Computer Vision, 2024
2023
IEEE Robotics Autom. Lett., 2023
CoRR, 2023
Lightweight Instruction Set for Flexible Dilated Convolutions and Mixed-Precision Operands.
Proceedings of the 24th International Symposium on Quality Electronic Design, 2023
Proceedings of the 60th ACM/IEEE Design Automation Conference, 2023
2022
Autonomous Robotic Screening of Tubular Structures Based Only on Real-Time Ultrasound Imaging Feedback.
IEEE Trans. Ind. Electron., 2022
Leibniz Trans. Embed. Syst., 2022
Non-iterative Blind Deblurring of Digital Microscope Images with Spatially Varying Blur.
Proceedings of the Medical Image Understanding and Analysis - 26th Annual Conference, 2022
Region of interest based non-dominated sorting genetic algorithm-II: an invite and conquer approach.
Proceedings of the GECCO '22: Genetic and Evolutionary Computation Conference, Boston, Massachusetts, USA, July 9, 2022
Potentials of combined visible light and near infrared imaging for driving automation.
Proceedings of the Autonomous Vehicles and Machines 2022, online, January 15-26, 2022, 2022
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Mind the Scaling Factors: Resilience Analysis of Quantized Adversarially Robust CNNs.
Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022
Proceedings of the DAC '22: 59th ACM/IEEE Design Automation Conference, San Francisco, California, USA, July 10, 2022
2021
Model-Based Design Space Exploration for FPGA-based Image Processing Applications Employing Parameterizable Approximations.
Microprocess. Microsystems, November, 2021
ACM Trans. Embed. Comput. Syst., 2021
Region of Interest-Based Parameter Optimization for Approximate Image Processing on FPGAs.
Int. J. Netw. Comput., 2021
BinaryCoP: Binary Neural Network-based COVID-19 Face-Mask Wear and Positioning Predictor on Edge Devices.
CoRR, 2021
Proceedings of the IEEE Intelligent Vehicles Symposium Workshops, 2021
Proceedings of the IEEE Intelligent Vehicles Symposium, 2021
BinaryCoP: Binary Neural Network-based COVID-19 Face-Mask Wear and Positioning Predictor on Edge Devices.
Proceedings of the IEEE International Parallel and Distributed Processing Symposium Workshops, 2021
BreakingBED: Breaking Binary and Efficient Deep Neural Networks by Adversarial Attacks.
Proceedings of the Intelligent Systems and Applications, 2021
Binary-LoRAX: Low-Latency Runtime Adaptable XNOR Classifier for Semi-Autonomous Grasping with Prosthetic Hands.
Proceedings of the IEEE International Conference on Robotics and Automation, 2021
Proceedings of the 13th International Conference on Agents and Artificial Intelligence, 2021
Proceedings of the Autonomous Vehicles and Machines 2021, online, January 11-28, 2021, 2021
A Framework for Hardware-Accelerated Design Space Exploration for Approximate Computing on FPGA.
Proceedings of the 24th Euromicro Conference on Digital System Design, 2021
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2021
Proceedings of the 32nd British Machine Vision Conference 2021, 2021
2020
Proceedings of the IEEE Nordic Circuits and Systems Conference, NorCAS 2020, Oslo, 2020
Proceedings of the 28th Color and Imaging Conference, 2020
Proceedings of the 2020 IEEE International Conference on Robotics and Automation, 2020
Neural Architecture Search for Automotive Grid Fusion Networks Under Embedded Hardware Constraints.
Proceedings of the 19th IEEE International Conference on Machine Learning and Applications, 2020
Proceedings of the Eighth International Symposium on Computing and Networking Workshops, 2020
Proceedings of the 2020 Design, Automation & Test in Europe Conference & Exhibition, 2020
ALF: Autoencoder-based Low-rank Filter-sharing for Efficient Convolutional Neural Networks.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020
Proceedings of the Computer Vision and Image Processing - 5th International Conference, 2020
2019
Proceedings of the International Conference on Robotics and Automation, 2019
Proceedings of the 2019 IEEE International Conference on Connected Vehicles and Expo, 2019
LCS-based automatic configuration of approximate computing parameters for FPGA system designs.
Proceedings of the Genetic and Evolutionary Computation Conference Companion, 2019
DSC: Dense-Sparse Convolution for Vectorized Inference of Convolutional Neural Networks.
Proceedings of the IEEE Conference on Computer Vision and Pattern Recognition Workshops, 2019
Proceedings of the 16th Conference on Computer and Robot Vision, 2019
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019
Proceedings of the Architecture of Computing Systems - ARCS 2019, 2019
2018
Efficient hardware acceleration of CNNs using logarithmic data representation with arbitrary log-base.
Proceedings of the International Conference on Computer-Aided Design, 2018
2017
Sensors, 2017
Online Multi-object Tracking-by-Clustering for Intelligent Transportation System with Neuromorphic Vision Sensor.
Proceedings of the KI 2017: Advances in Artificial Intelligence, 2017
Proceedings of the 28th IEEE International Conference on Application-specific Systems, 2017
2016
it Inf. Technol., 2016
EURASIP J. Adv. Signal Process., 2016
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016
Proceedings of the 22nd IEEE International Symposium on On-Line Testing and Robust System Design, 2016
Proceedings of the International Conference on High Performance Computing & Simulation, 2016
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016
Proceedings of the 2016 International Conference on Design and Technology of Integrated Systems in Nanoscale Era, 2016
Special session 1 automotive parallel computing challenges - architectures, applications and tricks.
Proceedings of the 2016 Conference on Design and Architectures for Signal and Image Processing (DASIP), 2016
Proceedings of the ACM International Conference on Computing Frontiers, CF'16, 2016
2015
J. Syst. Archit., 2015
J. Syst. Archit., 2015
it Inf. Technol., 2015
Protecting FPGA-based automotive systems against soft errors through reduced precision redundancy.
Proceedings of the 10th IEEE International Symposium on Industrial Embedded Systems, 2015
Improving wavelet denoising based on an in-depth analysis of the camera color processing.
Proceedings of the Real-Time Image and Video Processing 2015, 2015
Design of fine-grained sequential approximate circuits using probability-aware fault emulation.
Proceedings of the IEEE/ACM International Symposium on Low Power Electronics and Design, 2015
Proceedings of the 13th IEEE Symposium on Embedded Systems For Real-time Multimedia, 2015
Matching Detection and Correction Schemes for Soft Error Handling in Sequential Logic.
Proceedings of the 2015 Euromicro Conference on Digital System Design, 2015
Proceedings of the 26th IEEE International Conference on Application-specific Systems, 2015
2014
Beyond Standard Noise Models: Evaluating Denoising Algorithms with Respect to Realistic Camera Noise.
Int. J. Semantic Comput., 2014
Proceedings of the 2014 IEEE Visual Communications and Image Processing Conference, 2014
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
Towards low-cost fault detection strategy of FPGA configuration memory in real-time systems.
Proceedings of the 2014 IEEE 20th International On-Line Testing Symposium, 2014
Proceedings of the 22nd Color and Imaging Conference, 2014
Proceedings of the 2014 Conference on Design and Architectures for Signal and Image Processing, 2014
Proceedings of the Architecture of Computing Systems - ARCS 2014, 2014
Proceedings of the ARCS 2014, 2014
2013
J. Real Time Image Process., 2013
Proceedings of the 2013 23rd International Workshop on Power and Timing Modeling, 2013
Towards an Evaluation of Denoising Algorithms with Respect to Realistic Camera Noise.
Proceedings of the 2013 IEEE International Symposium on Multimedia, 2013
RTL Simulation of High Performance Dynamic Reconfiguration: A Video Processing Case Study.
Proceedings of the 2013 IEEE International Symposium on Parallel & Distributed Processing, 2013
Proceedings of the 43. Jahrestagung der Gesellschaft für Informatik, 2013
Proceedings of the 43. Jahrestagung der Gesellschaft für Informatik, 2013
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
Weighted partitioning of sequential processing chains for dynamically reconfigurable FPGAS.
Proceedings of the 23rd International Conference on Field programmable Logic and Applications, 2013
A Design Space Exploration Framework For Automotive Embedded Systems And Their Power Management.
Proceedings of the 27th European Conference on Modelling and Simulation, 2013
FPGA Based Real-Time Data Processing DAQ System for the Mercury Imaging X-Ray Spectrometer.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013
Proceedings of the 2013 Conference on Design and Architectures for Signal and Image Processing, 2013
Proceedings of the Architecture of Computing Systems - ARCS 2013, 2013
2012
Proceedings of the 2012 International Conference on Embedded Computer Systems: Architectures, 2012
Proceedings of the 22nd International Conference on Field Programmable Logic and Applications (FPL), 2012
Proceedings of the IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2012
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012
Proceedings of the 2012 Conference on Design and Architectures for Signal and Image Processing, 2012
A Real-Time Capable Virtualized Information and Communication Technology Infrastructure for Automotive Systems.
Proceedings of the Advances in Real-Time Systems (to Georg Färber on the occasion of his appointment as Professor Emeritus at TU München after leading the Lehrstuhl für Realzeit-Computersysteme for 34 illustrious years)., 2012
Proceedings of the 17th Asia and South Pacific Design Automation Conference, 2012
Proceedings of the ARCS 2012 Workshops, 28. Februar - 2. März 2012, München, Germany, 2012
2011
Default Reasoning for Forensic Visual Surveillance based on Subjective Logic and Its Comparison with L-Fuzzy Set Based Approaches.
Int. J. Multim. Data Eng. Manag., 2011
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011
A Model-Based Software Generation Approach Qualified for Heterogeneous GPGPU-Enabled Platforms.
Proceedings of the Applications, Tools and Techniques on the Road to Exascale Computing, Proceedings of the conference ParCo 2011, 31 August, 2011
A reasoning approach to enable abductive semantic explanation upon collected observations for forensic visual surveillance.
Proceedings of the 2011 IEEE International Conference on Multimedia and Expo, 2011
An architecture and an FPGA prototype of a reliable processor pipeline towards multiple soft- and timing errors.
Proceedings of the 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2011
An approach to self-learning multicore reconfiguration management applied on Robotic Vision.
Proceedings of the 2011 Conference on Design and Architectures for Signal and Image Processing, 2011
Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011
Proceedings of the Organic Computing - A Paradigm Shift for Complex Systems, 2011
2010
Forensic reasoning upon pre-obtained surveillance metadata using uncertain spatio-temporal rules and subjective logic.
Proceedings of the 11th International Workshop on Image Analysis for Multimedia Interactive Services, 2010
Stereo Vision based Vehicle Detection.
Proceedings of the VISAPP 2010 - Proceedings of the Fifth International Conference on Computer Vision Theory and Applications, Angers, France, May 17-21, 2010, 2010
Subjective Logic Based Approach to Modeling Default Reasoning for Visual Surveillance.
Proceedings of the 4th IEEE International Conference on Semantic Computing (ICSC 2010), 2010
Proceedings of the 13th IEEE International Symposium on Object/Component/Service-Oriented Real-Time Distributed Computing Workshops, 2010
Proceedings of the 13th Euromicro Conference on Digital System Design, 2010
Proceedings of the Design, Automation and Test in Europe, 2010
Proceedings of the Dynamically Reconfigurable Architectures, 11.07. - 16.07.2010, 2010
Subjective Logic Based Hybrid Approach to Conditional Evidence Fusion for Forensic Visual Surveillance.
Proceedings of the Seventh IEEE International Conference on Advanced Video and Signal Based Surveillance, 2010
Towards Rapid Dynamic Partial Reconfiguration in Video-Based Driver Assistance Systems.
Proceedings of the Reconfigurable Computing: Architectures, 2010
Proceedings of the Dynamically Reconfigurable Systems - Architectures, 2010
2009
IEEE Trans. Very Large Scale Integr. Syst., 2009
Toward contextual forensic retrieval for visual surveillance: Challenges and an architectural approach.
Proceedings of the 10th Workshop on Image Analysis for Multimedia Interactive Services, 2009
Segmentation Through Edge-linking - Segmentation for Video-based Driver Assistance Systems.
Proceedings of the IMAGAPP 2009, 2009
Optimizing the SUSAN corner detection algorithm for a high speed FPGA implementation.
Proceedings of the 19th International Conference on Field Programmable Logic and Applications, 2009
2008
Proceedings of the Ninth International Workshop on Image Analysis for Multimedia Interactive Services, 2008
Proceedings of the 38. Jahrestagung der Gesellschaft für Informatik, Beherrschbare Systeme, 2008
Proceedings of the 38. Jahrestagung der Gesellschaft für Informatik, Beherrschbare Systeme, 2008
A multi-platform controller allowing for maximum Dynamic Partial Reconfiguration throughput.
Proceedings of the FPL 2008, 2008
Proceedings of the FPL 2008, 2008
Design Flows, Communication Based Design and Architectures in Automotive Electronic Systems.
Proceedings of the Design, Automation and Test in Europe, 2008
Hardware/software architecture of an algorithm for vision-based real-time vehicle detection in dark environments.
Proceedings of the Design, Automation and Test in Europe, 2008
Proceedings of the Reconfigurable Computing: Architectures, 2008
2007
Autovision - A Run-time Reconfigurable MPSoC Architecture for Future Driver Assistance Systems (Autovision - Eine zur Laufzeit rekonfigurierbare MPSoC Architektur für zukünftige Fahrerassistenzsysteme).
it Inf. Technol., 2007
A review of different object recognition methods for the application in driver assistance systems.
Proceedings of the Eighth International Workshop on Image Analysis for Multimedia Interactive Services, 2007
Proceedings of the 2007 IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2007), 2007
Proceedings of the 21th International Parallel and Distributed Processing Symposium (IPDPS 2007), 2007
Using partial-run-time reconfigurable hardware to accelerate video processing in driver assistance system.
Proceedings of the 2007 Design, Automation and Test in Europe Conference and Exposition, 2007
2006
Proceedings of the IFIP VLSI-SoC 2006, 2006
Error Detection Techniques Applicable in an Architecture Framework and Design Methodology for Autonomic SoCs.
Proceedings of the Biologically Inspired Cooperative Computing, 2006
Proceedings of the 36. Jahrestagung der Gesellschaft für Informatik, 2006
Proceedings of the 2006 IEEE International Conference on Field Programmable Technology, 2006
Proceedings of the Conference on Design, Automation and Test in Europe, 2006
Proceedings of the Dynamically Reconfigurable Architectures, 02.04. - 07.04.2006, 2006
Proceedings of the ARCS 2006, 2006
2005
Proceedings of the Integrated Circuit and System Design, 2005
Proceedings of the Second International Conference on Autonomic Computing (ICAC 2005), 2005
Proceedings of the 35. Jahrestagung der Gesellschaft für Informatik, 2005
Reduction of CMOS Power Consumption and Signal Integrity Issues by Routing Optimization.
Proceedings of the 2005 Design, 2005
Proceedings of the 2005 Design, 2005
Towards a Framework and a Design Methodology for Autonomous SoC.
Proceedings of the 18th International Conference on Architecture of Computing Systems, 2005
2004
Towards a Dynamically Reconfigurable System-on-Chip Platform for Video Signal Processing.
Proceedings of the ARCS 2004, 2004
2003
Proceedings of the Signal and Image Processing (SIP 2003), 2003
2002
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002
Dual Supply Voltage Scaling in a Conventional Power-Driven Logic Synthesis Environment.
Proceedings of the Integrated Circuit Design. Power and Timing Modeling, 2002
Proceedings of the 2002 International Symposium on Low Power Electronics and Design, 2002
Proceedings of the 2002 IEEE International Conference on Multimedia and Expo, 2002
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Impact of technology evolution on dual supply voltage scaling and gate resizing in power-driven logic synthesis.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Efficiency of dual supply voltage logic synthesis for low power in consideration of varying delay constraint strictness.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Efficient power modeling techniques for combinational and sequential RTL macroblocks.
Proceedings of the 2002 9th IEEE International Conference on Electronics, 2002
Proceedings of the 2002 Data Compression Conference (DCC 2002), 2002
2000
A coprocessor architecture implementing the MPEG-4 visual core profile for mobile multimedia applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000
1999
A video segmentation algorithm for hierarchical object representations and its implementation.
IEEE Trans. Circuits Syst. Video Technol., 1999
1997
A flexible VLSI architecture for variable block size segment matching with luminance correction.
Proceedings of the 1997 International Conference on Application-Specific Systems, 1997