Seetharaman Ramachandran

According to our database1, Seetharaman Ramachandran authored at least 11 papers between 1999 and 2015.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2015
Tsallis entropy and particle swarm optimization-based cyclone image vortex localization.
Proceedings of the 2015 International Conference on Advances in Computing, 2015

2005
Design and FPGA implementation of an MPEG based video scalar with reduced on-chip memory utilization.
J. Syst. Archit., 2005

2003
Design and FPGA Implementation of a Video Scalar with on-chip reduced memory utilization.
Proceedings of the 2003 Euromicro Symposium on Digital Systems Design (DSD 2003), 2003

2002
A Novel, Automatic Quality Control Scheme for Real Time Image Transmission.
VLSI Design, 2002

A Dynamically Reconfigurable Video Compression Scheme Using FPGAs with Coarse-grain Parallelism.
VLSI Design, 2002

A fast, FPGA-based MPEG-2 video encoder with a novel automatic quality control scheme.
Microprocess. Microsystems, 2002

2001
FPGA implementation of a novel, fast motion estimation algorithm for real-time video compression.
Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays, 2001

2000
Design and implementation of an EPLD-based variable length coder for real time image compression applications.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A programmable pruning level control based MPEG video encoder.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Parallel Implementation of 2D-Discrete Cosine Transform Using EPLDs.
Proceedings of the 12th International Conference on VLSI Design (VLSI Design 1999), 1999

EPLD-based architecture of real time 2D-discrete cosine transform and quantization for image compression.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999


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