Sergio Soto Aguilar

According to our database, Sergio Soto Aguilar authored at least 3 papers between 2014 and 2018.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2018

A Time-Domain Digital-Intensive Built-In Tester for Analog Circuits.

Congyin Shi, Sanghoon Lee, Sergio Soto Aguilar, Edgar Sánchez-Sinencio

J. Electron. Test., 2018

Surrogate-based Optimization-aided Design for Low Power Analog Circuits.

Sergio Soto Aguilar, Adriana C. Sanabria-Borbon, Edgar Sánchez-Sinencio

Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

2014

Reduced clock harmonic distortion technique in maximum tunable switched-R-MOSFET-C filters.

Arunvenkatesh Alagappan, Sergio Soto Aguilar, Edgar Sánchez-Sinencio

Proceedings of the IEEE 57th International Midwest Symposium on Circuits and Systems, 2014