Edgar Sánchez-Sinencio

According to our database1, Edgar Sánchez-Sinencio authored at least 170 papers between 1985 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1992, "For contributions to monolithic analog filter design.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Highly Linear Low-Power Wireless RF Receiver for WSN.
IEEE Trans. VLSI Syst., 2019

An On-Chip Built-in Linearity Estimation Methodology and Hardware Implementation.
IEEE Trans. on Circuits and Systems, 2019

A Unified Amplifier-Based CC-CV Linear Charger for Energy-Constrained Low-Power Applications.
IEEE Trans. on Circuits and Systems, 2019

Reconfigurable System for Electromagnetic Energy Harvesting With Inherent Activity Sensing Capabilities for Wearable Technology.
IEEE Trans. on Circuits and Systems, 2019

Taming the Stability-Constrained Performance Optimization Challenge of Distributed On-Chip Voltage Regulation.
IEEE Trans. on CAD of Integrated Circuits and Systems, 2019

Design of Sub-Gigahertz Reconfigurable RF Energy Harvester From -22 to 4 dBm With 99.8% Peak MPPT Power Efficiency.
J. Solid-State Circuits, 2019

2018
Design Space Exploration of Distributed On-Chip Voltage Regulation Under Stability Constraint.
IEEE Trans. VLSI Syst., 2018

A 13.56-MHz CMOS Active Rectifier With a Voltage Mode Switched-Offset Comparator for Implantable Medical Devices.
IEEE Trans. VLSI Syst., 2018

Search for Optimal Pulse Charging Parameters for Li-Ion Polymer Batteries Using Taguchi Orthogonal Arrays.
IEEE Trans. Industrial Electronics, 2018

An Efficient and Fast Li-Ion Battery Charging System Using Energy Harvesting or Conventional Sources.
IEEE Trans. Industrial Electronics, 2018

An Integrated Concurrent Multiple-Input Self-Startup Energy Harvesting Capacitive-Based DC Adder Combiner.
IEEE Trans. Industrial Electronics, 2018

An Area Efficient Thermal Energy Harvester With Reconfigurable Capacitor Charge Pump for IoT Applications.
IEEE Trans. on Circuits and Systems, 2018

A Switched Capacitor Energy Harvester Based on a Single-Cycle Criterion for MPPT to Eliminate Storage Capacitor.
IEEE Trans. on Circuits and Systems, 2018

A Built-In Self-Test and In Situ Analog Circuit Optimization Platform.
IEEE Trans. on Circuits and Systems, 2018

A Time-Domain Digital-Intensive Built-In Tester for Analog Circuits.
J. Electronic Testing, 2018

Surrogate-based Optimization-aided Design for Low Power Analog Circuits.
Proceedings of the IEEE 61st International Midwest Symposium on Circuits and Systems, 2018

Technology Enabling Circuits and Systems for the Internet-of-Things: An Overview.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Towards provably-secure analog and mixed-signal locking against overproduction.
Proceedings of the International Conference on Computer-Aided Design, 2018

2017
An All-MOSFET Sub-1-V Voltage Reference With a - 51 -dB PSR up to 60 MHz.
IEEE Trans. VLSI Syst., 2017

Guest Editorial Special Issue on Circuits and Systems for the Internet of Things - From Sensing to Sensemaking.
IEEE Trans. on Circuits and Systems, 2017

An All-MOSFET Voltage Reference With -50-dB PSR at 80 MHz for Low-Power SoC Design.
IEEE Trans. on Circuits and Systems, 2017

Ultrasonic Electric Scalpels Based on a Sliding-Mode Controller With an Auxiliary PLL Frequency Discriminator.
IEEE Trans. Biomed. Circuits and Systems, 2017

A 0.8-1.2 V 10-50 MS/s 13-bit Subranging Pipelined-SAR ADC Using a Temperature-Insensitive Time-Based Amplifier.
J. Solid-State Circuits, 2017

On-Chip Two-Tone Synthesizer Based on a Mixing-FIR Architecture.
J. Solid-State Circuits, 2017

A Fully Integrated Reconfigurable Self-Startup RF Energy-Harvesting System With Storage Capability.
J. Solid-State Circuits, 2017

Efficient use of gain-bandwidth product in active filters: Gm-C and Active-R alternatives.
Proceedings of the 8th IEEE Latin American Symposium on Circuits & Systems, 2017

Thwarting analog IC piracy via combinational locking.
Proceedings of the IEEE International Test Conference, 2017

Session 22 overview: Harvesting and wireless power.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

21.4 A reduced-order sliding-mode controller with an auxiliary PLL frequency discriminator for ultrasonic electric scalpels.
Proceedings of the 2017 IEEE International Solid-State Circuits Conference, 2017

Noise-sensitive feedback loop identification in linear time-varying analog circuits.
Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2017

Analog filter design: Current design techniques and trends.
Proceedings of the 2017 IEEE Custom Integrated Circuits Conference, 2017

2016
A Capacitor-Less LDO With High-Frequency PSR Suitable for a Wide Range of On-Chip Capacitive Loads.
IEEE Trans. VLSI Syst., 2016

Introduction to the December Special Issue on the 2016 IEEE International Solid-State Circuits Conference.
J. Solid-State Circuits, 2016

A Highly Efficient Reconfigurable Charge Pump Energy Harvester With Wide Harvesting Range and Two-Dimensional MPPT for Internet of Things.
J. Solid-State Circuits, 2016

An Autonomous Energy Harvesting Power Management Unit With Digital Regulation for IoT Applications.
J. Solid-State Circuits, 2016

21.1 A single-cycle MPPT charge-pump energy harvester using a thyristor-based VCO without storage capacitor.
Proceedings of the 2016 IEEE International Solid-State Circuits Conference, 2016

Distributed on-chip regulation: theoretical stability foundation, over-design reduction and performance optimization.
Proceedings of the 53rd Annual Design Automation Conference, 2016

2015
A Highly Efficient Ultralow Photovoltaic Power Harvesting System With MPPT for Internet of Things Smart Nodes.
IEEE Trans. VLSI Syst., 2015

An Automatic Resonance Tracking Scheme With Maximum Power Transfer for Piezoelectric Transducers.
IEEE Trans. Industrial Electronics, 2015

A Power Management Unit With 40 dB Switching-Noise-Suppression for a Thermal Harvesting Array.
IEEE Trans. on Circuits and Systems, 2015

150-850 MHz High-Linearity Sine-wave Synthesizer Architecture Based on FIR Filter Approach and SFDR Optimization.
IEEE Trans. on Circuits and Systems, 2015

A Home Sleep Apnea Screening Device With Time-Domain Signal Processing and Autonomous Scoring Capability.
IEEE Trans. Biomed. Circuits and Systems, 2015

An 86% Efficiency 12 µW Self-Sustaining PV Energy Harvesting System With Hysteresis Regulation and Time-Domain MPPT for IOT Smart Nodes.
J. Solid-State Circuits, 2015

Low power complementary metal-oxide semiconductor class-G audio amplifier with gradual power supply switching.
IET Circuits, Devices & Systems, 2015

Built-In Self Optimization for Variation Resilience of Analog Filters.
Proceedings of the 2015 IEEE Computer Society Annual Symposium on VLSI, 2015

20.7 A 0.45-to-3V reconfigurable charge-pump energy harvester with two-dimensional MPPT for Internet of Things.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

2014
Boost Converter With Dynamic Input Impedance Matching for Energy Harvesting With Multi-Array Thermoelectric Generators.
IEEE Trans. Industrial Electronics, 2014

Electromagnetic Interference Resisting Operational Amplifier.
IEEE Trans. on Circuits and Systems, 2014

An Energy-Efficient Time-Domain Asynchronous 2 b/Step SAR ADC With a Hybrid R-2R/C-3C DAC Structure.
J. Solid-State Circuits, 2014

A Feed-Forward Power-Supply Noise Cancellation Technique for Single-Ended Class-D Audio Amplifiers.
J. Solid-State Circuits, 2014

Survey of integrated-circuit-oscillator phase-noise analysis.
I. J. Circuit Theory and Applications, 2014

Smart nodes of internet of things (IoT): a hardware perspective view & implementation.
Proceedings of the Great Lakes Symposium on VLSI 2014, GLSVLSI '14, Houston, TX, USA - May 21, 2014

An ultra-low power power management unit with -40dB switching-noise-suppression for a 3×3 thermoelectric generator array with 57% maximum end-to-end efficiency.
Proceedings of the IEEE 2014 Custom Integrated Circuits Conference, 2014

2013
Current-Reused 2.4-GHz Direct-Modulation Transmitter With On-Chip Automatic Tuning.
IEEE Trans. VLSI Syst., 2013

A Low-Power Configurable Neural Recording System for Epileptic Seizure Detection.
IEEE Trans. Biomed. Circuits and Systems, 2013

A Spur-Frequency-Boosting PLL With a -74 dBc Reference-Spur Suppression in 90 nm Digital CMOS.
J. Solid-State Circuits, 2013

2012
Advanced Quenching Techniques for Super-Regenerative Radio Receivers.
IEEE Trans. on Circuits and Systems, 2012

Multiloop High-Power-Supply-Rejection Quadrature Ring Oscillator.
J. Solid-State Circuits, 2012

A 2-GHz Highly Linear Efficient Dual-Mode BiCMOS Power Amplifier Using a Reconfigurable Matching Network.
J. Solid-State Circuits, 2012

Low Phase Noise Wide Tuning Range N-Push Cyclic-Coupled Ring Oscillators.
J. Solid-State Circuits, 2012

Ultra-low-voltage power management unit for thermal energy harvesting applications.
Proceedings of the 10th IEEE International NEWCAS Conference, 2012

2011
Linearization Techniques for CMOS Low Noise Amplifiers: A Tutorial.
IEEE Trans. on Circuits and Systems, 2011

A DCVSL Delay Cell for Fast Low Power Frequency Synthesis Applications.
IEEE Trans. on Circuits and Systems, 2011

A Low-Power High-PSRR Clock-Free Current-Controlled Class-D Audio Amplifier.
J. Solid-State Circuits, 2011

A Micropower Low-Noise Neural Recording Front-End Circuit for Epileptic Seizure Detection.
J. Solid-State Circuits, 2011

A 0.8 ps DNL Time-to-Digital Converter With 250 MHz Event Rate in 65 nm CMOS for Time-Mode-Based Sigma Delta Modulator.
J. Solid-State Circuits, 2011

An Inductor-Less Noise-Cancelling Broadband Low Noise Amplifier With Composite Transistor Pair in 90 nm CMOS Technology.
J. Solid-State Circuits, 2011

A Continuous Time Multi-Bit Delta Sigma ADC Using Time Domain Quantizer and Feedback Element.
J. Solid-State Circuits, 2011

A Wideband Millimeter-Wave Frequency Synthesis Architecture Using Multi-Order Harmonic-Synthesis and Variable N -Push Frequency Multiplication.
J. Solid-State Circuits, 2011

A 0.6-to-200MSPS speed reconfigurable and 1.9-to-27mW power scalable 10bit ADC.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

A fully integrated highly linear efficient power amplifier in 0.25µm BiCMOS technology for wireless applications.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
Attenuation-Predistortion Linearization of CMOS OTAs With Digital Correction of Process Variations in OTA-C Filter Applications.
J. Solid-State Circuits, 2010

A Low THD, Low Power, High Output-Swing Time-Mode-Based Tunable Oscillator Via Digital Harmonic-Cancellation Technique.
J. Solid-State Circuits, 2010

A Millimeter-Wave (23-32 GHz) Wideband BiCMOS Low-Noise Amplifier.
J. Solid-State Circuits, 2010

High PSR Low Drop-Out Regulator With Feed-Forward Ripple Cancellation Technique.
J. Solid-State Circuits, 2010

A 140mA 90nm CMOS low drop-out regulator with -56dB power supply rejection at 10MHz.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010

2009
An On-Chip Loopback Block for RF Transceiver Built-In Test.
IEEE Trans. on Circuits and Systems, 2009

System and Circuit Design for an MB-OFDM UWB Frequency Synthesizer.
IEEE Trans. on Circuits and Systems, 2009

Power-Aware Multiband-Multistandard CMOS Receiver System-Level Budgeting.
IEEE Trans. on Circuits and Systems, 2009

A Low-Power, Linearized, Ultra-Wideband LNA Design Technique.
J. Solid-State Circuits, 2009

RF Oscillator Based on a Passive RC Bandpass Filter.
J. Solid-State Circuits, 2009

Low-Power High-Efficiency Class D Audio Power Amplifiers.
J. Solid-State Circuits, 2009

Design of Three-Stage Class-AB 16ΩHeadphone Driver Capable of Handling Wide Range of Load Capacitance.
J. Solid-State Circuits, 2009

A 1-V +31 dBm IIP3, Reconfigurable, Continuously Tunable, Power-Adjustable Active-RC LPF.
J. Solid-State Circuits, 2009

Two Class-D audio amplifiers with 89/90% efficiency and 0.02/0.03% THD+N consuming less than 1mW of quiescent power.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A 25mA 0.13µm CMOS LDO regulator with power-supply rejection better than -56dB up to 10MHz using a feedforward ripple-cancellation technique.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

A 20MHz BW 68dB DR CT ΔΣ ADC based on a multi-bit time-domain quantizer and feedback element.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
A Broadband CMOS Amplitude Detector for On-Chip RF Measurements.
IEEE Trans. Instrumentation and Measurement, 2008

A Robust and Scalable Constant- gm Rail-to-Rail CMOS Input Stage With Dynamic Feedback for VLSI Cell Libraries.
IEEE Trans. on Circuits and Systems, 2008

Applications of Multipath Transform-Domain Charge-Sampling Wide-Band Receivers.
IEEE Trans. on Circuits and Systems, 2008

A Current Injection Built-In Test Technique for RF Low-Noise Amplifiers.
IEEE Trans. on Circuits and Systems, 2008

A Noise Reduction and Linearity Improvement Technique for a Differential Cascode LNA.
J. Solid-State Circuits, 2008

A 1.2mW 1.6Vpp-Swing Class-AB 16Ω Headphone Driver Capable of Handling Load Capacitance up to 22nF.
Proceedings of the 2008 IEEE International Solid-State Circuits Conference, 2008

A low power 1.3GHz dual-path current mode Gm-C filter.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
Design of a Class D Audio Amplifier IC Using Sliding Mode Control and Negative Feedback.
IEEE Trans. Consumer Electronics, 2007

Full On-Chip CMOS Low-Dropout Voltage Regulator.
IEEE Trans. on Circuits and Systems, 2007

Low-Power Architecture and Circuit Techniques for High-Boost Wide-Band Gm-C Filters.
IEEE Trans. on Circuits and Systems, 2007

An Accurate Automatic Quality-Factor Tuning Scheme for Second-Order LC Filters.
IEEE Trans. on Circuits and Systems, 2007

An 11-Band 3-10 GHz Receiver in SiGe BiCMOS for Multiband OFDM UWB Communication.
J. Solid-State Circuits, 2007

Nonlinear Shaping SC Oscillator With Enhanced Linearity.
J. Solid-State Circuits, 2007

A 1.1 GHz Fifth Order Active-LC Butterworth Type Equalizing Filter.
J. Solid-State Circuits, 2007

A general framework for evaluating nonlinearity, noise and dynamic range in continuous-time OTA-C filters for computer-aided design and optimization.
I. J. Circuit Theory and Applications, 2007

Low THD bandpass-based oscillator using multilevel hard limiter.
IET Circuits, Devices & Systems, 2007

A Low-Power Frequency Synthesizer with Quadrature Signal Generation for 2.4 GHz Zigbee Transceiver Applications.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

THD+Noise Estimation in Class-D Amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
CMOS RF receiver system design: a systematic approach.
IEEE Trans. on Circuits and Systems, 2006

Robust highly linear high-frequency CMOS OTA with IM3 below - 70 dB at 26 MHz.
IEEE Trans. on Circuits and Systems, 2006

Chameleon: a dual-mode 802.11b/Bluetooth receiver system design.
IEEE Trans. on Circuits and Systems, 2006

Frequency-dependent harmonic-distortion analysis of a linearized cross-coupled CMOS OTA and its application to OTA-C filters.
IEEE Trans. on Circuits and Systems, 2006

A Stable Loss Control Feedback Loop for VCO Amplitude Tuning.
IEEE Trans. on Circuits and Systems, 2006

On-Chip Testing Techniques for RF Wireless Transceivers.
IEEE Design & Test of Computers, 2006

Second order dynamic element matching technique for low oversampling delta sigma ADC.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
A rail-to-rail amplifier input stage with ±0.35%gm fluctuation.
IEEE Trans. on Circuits and Systems, 2005

A capacitor cross-coupled common-gate low-noise amplifier.
IEEE Trans. on Circuits and Systems, 2005

An On-Chip Spectrum Analyzer for Analog Built-In Testing.
J. Electronic Testing, 2005

A CMOS RF RMS Detector for Built-in Testing of Wireless Transceivers.
Proceedings of the 23rd IEEE VLSI Test Symposium (VTS 2005), 2005

Feedforward reversed nested Miller compensation techniques for three-stage amplifiers.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Constant-g/sub m/ techniques for rail-to-rail CMOS amplifier input stages: a comparative study.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A constant-g/sub m/ rail-to-rail op amp input stage using dynamic current scaling technique.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
A practical self-calibration scheme implementation for pipeline ADC.
IEEE Trans. Instrumentation and Measurement, 2004

An RC time constant auto-tuning structure for high linearity continuous-time ΣΔ modulators and active filters.
IEEE Trans. on Circuits and Systems, 2004

A fully parallel CMOS analog median filter.
IEEE Trans. on Circuits and Systems, 2004

An On-Chip Transfer Function Characterization System for Analog Built-in Testing.
Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

3-22GHz CMOS distributed single-balanced mixer.
Proceedings of the Proceedings 2004 IEEE International SOC Conference, 2004

A linearization technique for RF low noise amplifier.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Frequency synthesizer for on-chip testing and automated tuning.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Linearized CMOS OTA using active-error feedforward technique.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Single Miller capacitor compensated multistage amplifiers for large capacitive load applications.
Proceedings of the 2004 International Symposium on Circuits and Systems, 2004

Dynamic range, noise and linearity optimization of continuous-time OTA-C filters.
Proceedings of the 2004 11th IEEE International Conference on Electronics, 2004

2003
An Analog Integrated Circuit Design Laboratory.
Proceedings of the 2003 International Conference on Microelectronics Systems Education, 2003

A low-power CMOS complex filter for Bluetooth with frequency tuning.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

Variable gain amplifier with offset cancellation.
Proceedings of the 13th ACM Great Lakes Symposium on VLSI 2003, 2003

2002
A mixed-mode IF GFSK demodulator for Bluetooth.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

An auto-tuning structure for continuous time sigma-delta AD converter and high precision filters.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A 2.1-GHz monolithic frequency synthesizer with robust phase switching prescaler and loop capacitance scaling.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A 5-GHz prescaler using improved phase switching.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A 2-V 11-bit incremental A/D converter using floating gate technique.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

On-chip spectrum analyzer for built-in testing analog ICs.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

An improved Q-tuning scheme and a fully symmetric OTA.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Design tradeoffs of CMOS current mirrors using one-equation for all-region model.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

Design trade-offs of a symmetric linearized CMOS LC VCO.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

High-selectivity SC filters with continuous digital Q-factor programmability.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
A low voltage operational transconductance amplifier using common mode feedforward for high frequency switched capacitor circuits.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Linear cellular neural networks.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
A programmable rail-to-rail constant-gm input structure for LV amplifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Different operational transconductance amplifier topologies for obtaining very small transconductances.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

A fully parallel CMOS analog median filter.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

Periodical nonuniform individually sampled switched-capacitor circuits.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Auto-calibrating analog timer for on-chip testing.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

A low voltage fully differential nested Gm capacitance compensation amplifier: analysis and design.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

CMOS cryptosystem using a Lorenz chaotic oscillator.
Proceedings of the 1999 International Symposium on Circuits and Systems, ISCAS 1999, Orlando, Florida, USA, May 30, 1999

1998
Time multiplexed color image processing based on a CNN with cell-state outputs.
IEEE Trans. VLSI Syst., 1998

A Unified Approach for a Time-Domain Built-In Self-Test Technique and Fault Detection.
Proceedings of the 8th Great Lakes Symposium on VLSI (GLS-VLSI '98), 1998

1997
Cork quality classification system using a unified image processing and fuzzy-neural network methodology.
IEEE Trans. Neural Networks, 1997

1996
A 1.5V class AB output buffer.
Proceedings of the 1996 International Symposium on Low Power Electronics and Design, 1996

A new method for wavelets generation.
Proceedings of the 8th European Signal Processing Conference, 1996

1995
A Design Scheme to Stabilize the Active Gain Enhancement Amplifier.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A General Purpose Discrete-Time Multiplexing Neuron-Array Architecture.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A Nonlinear Macromodel for CMOS OTAs.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

A Universal Interface Between PC and Neural Networks Hardware.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

1994
A power supply ramping and current measurement based technique for analog fault diagnosis.
Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

Two Approaches for Current-Mode Filters using Voltage Follower and Transconductance Multipliers Building Blocks.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A Programmable 1.8-18MHz High-Q Fully-Differential Continuous-Time Filter with 1.5-2 Power Supply.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

1993
A high-density and low-power charge-based Hamming network.
IEEE Trans. VLSI Syst., 1993

A CMOS analog adaptive BAM with on-chip learning and weight refreshing.
IEEE Trans. Neural Networks, 1993

3v High-frequency Current-mode Filters.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Linearity, Accuracy and Bandwidth Considerations in Wideband CMOS Voltage Amplifiers.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

High Frequency Compensated Current-mode Ladder Filters Using Multiple Output OTAs.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1992
A modular CMOS design of a Hamming network.
IEEE Trans. Neural Networks, 1992

1985
AROMA: An Area Optimized CAD Program for Cascade SC Filter Design.
IEEE Trans. on CAD of Integrated Circuits and Systems, 1985


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