Sharvani Gadgil

According to our database, Sharvani Gadgil authored at least 4 papers between 2019 and 2023.

Collaborative distances:

• Dijkstra number of six.
• Erdős number of six.

2023

Power efficient designs of CNTFET-based ternary SRAM.

Sharvani Gadgil, Goli Naga Sandesh, Chetan Vudadha

Microelectron. J., September, 2023

2022

Design of CNTFET-based Ternary Logic circuits using Low power Encoder.

Siddharth T, Sharvani Gadgil, Chetan Vudadha

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2020

A Novel Low Power Ternary Multiplier Design using CNFETs.

Harita Sirugudi, Sharvani Gadgil, Chetan Vudadha

Proceedings of the 33rd International Conference on VLSI Design and 19th International Conference on Embedded Systems, 2020

2019

Design of Area Optimised, Energy Efficient Quaternary Circuits Using CNTFETs.

Poojan Patel, Nikita Doddapaneni, Sharvani Gadgil, Chetan Vudadha

Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019