Shinsaku Mori

According to our database1, Shinsaku Mori authored at least 51 papers between 1976 and 2006.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Links

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Bibliography

2006
Analysis of class D inverter with irregular driving patterns.
IEEE Trans. Circuits Syst. I Regul. Pap., 2006

A comparison of output envelope waveforms of the delta-sigma modulated class D series resonant inverter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

2005
Thinned-out controlled class D inverter with delta-sigma modulated 1-bit driving pulses.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

2004
FM/PWM control scheme in class DE inverter.
IEEE Trans. Circuits Syst. I Regul. Pap., 2004

Design of phase-controlled class E inverter with asymmetric circuit configuration.
IEEE Trans. Circuits Syst. II Express Briefs, 2004

2003
Soft-switching boost power factor correction converter with negative slope ramp carrier control.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

2002
Analysis of Class D-E Resonant dc/dc Converter Using Thinned-Out Method.
J. Circuits Syst. Comput., 2002

Simplified input current waveshaping technique by using inductor voltage sensing for power factor correction isolated Sepic rectifier.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

A compact DC/AC inverter for automotive application.
Proceedings of the 2002 International Symposium on Circuits and Systems, 2002

2001
Fundamental frequency parabolic PWM controller for lossless soft-switching boost power factor correction.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

FM/PWM control scheme on class DE inverter for keeping high power conversion efficiency.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

Compact DC/AC inverter for large electroluminescent lamp.
Proceedings of the 2001 International Symposium on Circuits and Systems, 2001

2000
New control scheme for class DE inverter by varying driving signals.
IEEE Trans. Ind. Electron., 2000

Class E isolated DC-DC converter using PWM synchronous rectifier.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2000

1999
Class DE current-source parallel resonant inverter.
IEEE Trans. Ind. Electron., 1999

1998
Analysis of phase-controlled resonant DC-AC inverters with class E amplifier and frequency multipliers.
IEEE Trans. Ind. Electron., 1998

The Neural Network Approach To A Parallel Decentralized Network Routing.
Neural Networks, 1998

1997
Performance of the time-shared code tracking loop with extended tracking range for frequency hopped signals.
Proceedings of the 8th IEEE International Symposium on Personal, 1997

A local connected neural oscillator network for sequential character segmentation.
Proceedings of International Conference on Neural Networks (ICNN'97), 1997

1996
Direct-Detection Optical Synchronous CDMA Systems with Double Optical Hard-Limiters Using Modified Prime Sequence Codes.
IEEE J. Sel. Areas Commun., 1996

Improved performance of fast acquisition PLL synthesizer with <i>N</i>-stage cycle swallower.
Eur. Trans. Telecommun., 1996

A Local Connected Neural Oscillator Network for Pattern Segmentation.
Proceedings of the Artificial Neural Networks, 1996

1995
New resonant DC/DC converter with Class de inverter and Class E Rectifier.
J. Circuits Syst. Comput., 1995

Resonant dc/dc Converter with Class E Inverter and Class E Synchronous Rectifier Using Thinned-Out Method.
Proceedings of the 1995 IEEE International Symposium on Circuits and Systems, ISCAS 1995, Seattle, Washington, USA, April 30, 1995

Investigation of generalization ability by using noise to enhance MLP performance.
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995

A learning method to control the frequency of the oscillatory neural network.
Proceedings of International Conference on Neural Networks (ICNN'95), Perth, WA, Australia, November 27, 1995

1994
An optimized synthesis of a discrete-time cellular neural network for parallel thinning.
Int. J. Circuit Theory Appl., 1994

Twin-Chaos - Simultaneous Asynchronous Oscillations of Chaos.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Synchronization Phenomena in RC Oscillators Coupled by One Resistor.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

A Class D Type High Frequency Tuned Power Amplifier with Class E Switching Conditions.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

On the Synchronization of Oscillators Coupled by One Negative Resistor.
Proceedings of the 1994 IEEE International Symposium on Circuits and Systems, ISCAS 1994, London, England, UK, May 30, 1994

Weak radar signal detection based on wavelet transform.
Proceedings of ICASSP '94: IEEE International Conference on Acoustics, 1994

1993
The study of synchronous and frequency demultiplication phase-locking for coupling each other system with two BNRT oscillators.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

On coupled oscillators networks - For the cellular neural network.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

Discrete-time cellular neural network for thinning: A compound synthesis.
Proceedings of the 1993 IEEE International Symposium on Circuits and Systems, 1993

1991
Block division carrier slot setting for satellite SCPC systems.
IEEE Trans. Commun., 1991

Multi-h phase-coded modulation.
IEEE Commun. Mag., 1991

Resequencing Delay for a Queueing System with Multiple Servers Under a Threshold-type Scheduling.
Proceedings of the Proceedings IEEE INFOCOM '91, 1991

A Secret Key Cryptosystem by Iterating a Chaotic Map.
Proceedings of the Advances in Cryptology, 1991

1990
Suppression of CW interference and filtered noise in QPRS systems using decision-feedback filters.
Proceedings of the 1990 International Conference on Acoustics, 1990

1986
Signal-to-noise ratio of arbitrary power-series envelope detector.
IEEE Trans. Inf. Theory, 1986

1985
Bandwidth Efficient Quadrature Overlapped Squared Raised-Cosine Modulation.
IEEE Trans. Commun., 1985

Asymmetrical Pulse Shaped QPSK Modulation Systems.
IEEE Trans. Commun., 1985

Network analysis by hierarchical tearing method.
Syst. Comput. Jpn., 1985

1984
Bandwidth Efficient Quadrature Overlapped Modulation.
IEEE Trans. Commun., 1984

Performance of Staggered QOSRC Modulation on a Hard-Limited Satellite Channel in the Presence of Uplink and Downlink Noise and Intersymbol Interference.
Proceedings of the IEEE International Conference on Communications: Links for the Future, 1984

1982
The Effects of Bandpass Limiters on Mth Phase Tracking Systems in the Presence of Sinusoidal Interference and Noise.
IEEE Trans. Commun., 1982

1981
Rewritable Progammable Logic Array of Current Mode Logic.
IEEE Trans. Computers, 1981

1980
Signal-to-Noise Ratio of the nth Law Amplifier for Non-Gaussian Noise.
IEEE Trans. Commun., 1980

1978
Performance of Binary Quantized All Digital Phase-Locked Loop with a New Class of Sequential Filter.
IEEE Trans. Commun., 1978

1976
Vibration pick-up type ear microphone.
Proceedings of the IEEE International Conference on Acoustics, 1976


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