Shuangyi Wu

According to our database, Shuangyi Wu authored at least 8 papers between 2014 and 2024.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2024

A 12b 3 GS/s Passive T/H Assisted Time-Interleaved Pipelined SAR ADC with Metastability Reduction Technique and Dynamic-Bias RA.

Qiang Yu, Zheng Zhu, Chao Li Ang, Qin Huang, Shanshan Han, Feng Tai, Rongbin Yang, Shuangyi Wu, Qiang Li

Proceedings of the IEEE Asian Solid-State Circuits Conference, 2024

2019

A Bandwidth Mismatch Optimization Technique in Time-Interleaved Analog-to-Digital Converters.

Jian Luo, Jing Li, Shuangyi Wu, Ning Ning, Yang Liu

J. Circuits Syst. Comput., 2019

2014

A Digital Timing Mismatch Calibration Technique in Time-Interleaved ADCs.

Jing Li, Shuangyi Wu, Yang Liu, Ning Ning, Qi Yu

IEEE Trans. Circuits Syst. II Express Briefs, 2014

Multiscaling coefficients Technique for gain error Background Calibration in Pipelined ADC.

Ning Ning, Zhiling Sui, Jing Li, Shuangyi Wu, Hua Chen, Shuangheng Xu, Qi Yu

J. Circuits Syst. Comput., 2014

A dithering Technique for Sha_less Pipelined ADC.

Ning Ning, Ling Du, Hua Chen, Shuangyi Wu, Qi Yu, Yang Liu

J. Circuits Syst. Comput., 2014

Digital Background Calibration for Timing skew in Time-Interleaved ADC.

Jing Li, Yang Liu, Shuangyi Wu, Ning Ning, Qi Yu

J. Circuits Syst. Comput., 2014

A digital background calibration technique for SAR ADC based on capacitor swapping.

Ling Du, Ning Ning, Shuangyi Wu, Qi Yu, Yang Liu

IEICE Electron. Express, 2014

A 10-bit 100MS/s subrange SAR ADC with time-domain quantization.

Ling Du, Shuangyi Wu, Min Jiang, Ning Ning, Qi Yu, Yang Liu

Proceedings of the IEEE International Symposium on Circuits and Systemss, 2014