Shuze Zhao

Orcid: 0000-0001-6990-046X

According to our database1, Shuze Zhao authored at least 6 papers between 2016 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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Bibliography

2019
FRoC 2.0: Automatic BRAM and Logic Testing to Enable Dynamic Voltage Scaling for FPGA Applications.
ACM Trans. Reconfigurable Technol. Syst., 2019

2018
Frequency-Domain Power Delivery Network Self-Characterization in FPGAs for Improved System Reliability.
IEEE Trans. Ind. Electron., 2018

Automatic Application-Specific Calibration to Enable Dynamic Voltage Scaling in FPGAs.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2018

Automatic BRAM Testing for Robust Dynamic Voltage Scaling for FPGAs.
Proceedings of the 28th International Conference on Field Programmable Logic and Applications, 2018

2017
Find the real speed limit: FPGA CAD for chip-specific application delay measurement.
Proceedings of the 27th International Conference on Field Programmable Logic and Applications, 2017

2016
Measure twice and cut once: Robust dynamic voltage scaling for FPGAs.
Proceedings of the 26th International Conference on Field Programmable Logic and Applications, 2016


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