According to our database1, Soowang Park authored at least 3 papers between 2017 and 2019.
Legend:Book In proceedings Article PhD thesis Other
Collaborative circuit designs using the CRAFT repository.
Future Generation Comp. Syst., 2019
Cache Design for Yield-per-Area Maximization: Switchable Spare Columns with Disabling (SSC-Disable).
Proceedings of the 37th IEEE VLSI Test Symposium, 2019
Accelerating Circuit Realization via a Collaborative Gateway of Innovations.
Proceedings of the 9th International Workshop on Science Gateways, 2017