Sandeep Gupta

According to our database, Sandeep Gupta authored at least 180 papers between 1988 and 2023.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of three.

2023

Design for testability (DFT) for RSFQ circuits.

Mingye Li, Yunkun Lin, Sandeep Gupta

Proceedings of the 41st IEEE VLSI Test Symposium, 2023

2022

Methods for testing path delay and static faults in RSFQ circuits.

Mingye Li, Fangzhou Wang, Sandeep Gupta

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

Memristor-Specific Failures: New Verification Methods and Emerging Test Problems.

Baishakhi Rani Biswas, Sandeep Gupta

Proceedings of the 40th IEEE VLSI Test Symposium, 2022

Fault-coverage Maximizing March Tests for Memory Testing.

Feng Yun, Yunkun Lin, Lou Yunfei, Lei Gao, Vaibhav Gera, Boxuan Li, Vennela Chowdary Nekkanti, Aditya Rajendra Pharande, Kunal Sheth, Meghana Thommondru, Guizhong Ye, Sandeep Gupta

Proceedings of the IEEE International Test Conference, 2022

2021

From Specification to Silicon: Towards Analog/Mixed-Signal Design Automation using Surrogate NN Models with Transfer Learning.

Juzheng Liu, Shiyu Su, Meghna Madhusudan, Mohsen Hassanpourghadi, Samuel Saunders, Qiaochu Zhang, Rezwan A. Rasul, Yaguang Li, Jiang Hu, Arvind Kumar Sharma, Sachin S. Sapatnekar, Ramesh Harjani, Anthony Levi, Sandeep Gupta, Mike Shuo-Wei Chen

Proceedings of the IEEE/ACM International Conference On Computer Aided Design, 2021

HW-BCP: A Custom Hardware Accelerator for SAT Suitable for Single Chip Implementation for Large Benchmarks.

Soowang Park, Jae-Won Nam, Sandeep K. Gupta

Proceedings of the ASPDAC '21: 26th Asia and South Pacific Design Automation Conference, 2021

2020

Aging-resilient SRAM design: an end-to-end framework.

Xuan Zuo, Sandeep K. Gupta

Proceedings of the 38th IEEE VLSI Test Symposium, 2020

Data-driven fault model development for superconducting logic.

Mingye Li, Fangzhou Wang, Sandeep Gupta

Proceedings of the IEEE International Test Conference, 2020

2019

Collaborative circuit designs using the CRAFT repository.

Adam Brinckman, Ewa Deelman, Sandeep Gupta, Jarek Nabrzyski, Soowang Park, Rafael Ferreira da Silva, Ian J. Taylor, Karan Vahi

Future Gener. Comput. Syst., 2019

A New Method for Software Test Data Generation Inspired by D-algorithm.

Jianwei Zhang, Sandeep K. Gupta, William G. J. Halfond

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Automatic Test Pattern Generation for timing verification and delay testing of RSFQ circuits.

Fangzhou Wang, Sandeep Gupta

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Cache Design for Yield-per-Area Maximization: Switchable Spare Columns with Disabling (SSC-Disable).

Soowang Park, Sandeep K. Gupta

Proceedings of the 37th IEEE VLSI Test Symposium, 2019

Multi-cell characterization: Developing robust cells and abstraction for Rapid Single Flux Quantum (RSFQ) Logic.

Fangzhou Wang, Sandeep Gupta

Proceedings of the IEEE International Test Conference, 2019

2017

Asymmetric sizing: An effective design approach for SRAM cells against BTI aging.

Xuan Zuo, Sandeep K. Gupta

Proceedings of the 35th IEEE VLSI Test Symposium, 2017

Keynote address tribute to Professor Mel Breuer: Contributions to CAD and Test.

Sandeep Gupta, Miron Abramovici, Magdy Abadir, Sridhar Narayanan

Proceedings of the 35th IEEE VLSI Test Symposium, 2017

Accelerating Circuit Realization via a Collaborative Gateway of Innovations.

Ian J. Taylor, Adam Brinckman, Ewa Deelman, Rafael Ferreira da Silva, Sandeep Gupta, Jarek Nabrzyski, Soowang Park, Karan Vahi

Proceedings of the 9th International Workshop on Science Gateways, 2017

Wordline overdriving test: An effective predictive testing method for SRAMs against BTI aging.

Jizhe Zhang, Sandeep K. Gupta

Proceedings of the 18th International Symposium on Quality Electronic Design, 2017

2016

Process variation oriented delay testing of SRAMs.

Xuan Zuo, Sandeep K. Gupta

Proceedings of the 34th IEEE VLSI Test Symposium, 2016

SRAM yield-per-area optimization under spatially-correlated process variation.

Jizhe Zhang, Sandeep K. Gupta

Proceedings of the 34th IEEE VLSI Test Symposium, 2016

Using hardware testing approaches to improve software testing: Undetectable mutant identification.

Jianwei Zhang, Sandeep K. Gupta

Proceedings of the 34th IEEE VLSI Test Symposium, 2016

Yield estimation and statistical design of memristor cross-point memory systems.

Jizhe Zhang, Sandeep K. Gupta

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

2015

A multi-layered methodology for defect-tolerance of datapath modules in processors.

Hsunwei Hsiung, Sandeep K. Gupta

Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

PPB: Partially-working processors binning for maximizing wafer utilization.

Da Cheng, Sandeep K. Gupta

Proceedings of the 33rd IEEE VLSI Test Symposium, 2015

Analysis and optimization of soft error tolerance strategies for real-time systems.

Bowen Zheng, Yue Gao, Qi Zhu, Sandeep K. Gupta

Proceedings of the 2015 International Conference on Hardware/Software Codesign and System Synthesis, 2015

2014

Maximizing Yield per Area of Highly Parallel CMPs Using Hardware Redundancy.

Da Cheng, Sandeep K. Gupta

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2014

Optimizing redundancy design for chip-multiprocessors for flexible utility functions.

Da Cheng, Sandeep K. Gupta

Proceedings of the 2014 International Test Conference, 2014

Efficient post-silicon validation via segmentation of process variation envelope - Global vs local variations.

Prasanjeet Das, Sandeep K. Gupta

Proceedings of the Fifteenth International Symposium on Quality Electronic Design, 2014

An energy-aware fault tolerant scheduling framework for soft error resilient cloud computing systems.

Yue Gao, Sandeep K. Gupta, Yanzhi Wang, Massoud Pedram

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

SRAM Array Yield Estimation under Spatially-Correlated Process Variation.

Jizhe Zhang, Sandeep Gupta

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

Optimal Redundancy Designs for CNFET-Based Circuits.

Da Cheng, Fangzhou Wang, Feng Gao, Sandeep K. Gupta

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

A Resizing Method to Minimize Effects of Hardware Trojans.

Byeongju Cha, Sandeep K. Gupta

Proceedings of the 23rd IEEE Asian Test Symposium, 2014

2013

Extending pre-silicon delay models for post-silicon tasks: Validation, diagnosis, delay testing, and speed binning.

Prasanjeet Das, Sandeep K. Gupta

Proceedings of the 31st IEEE VLSI Test Symposium, 2013

Gate delay modeling for pre- and post-silicon timing related tasks for ultra-low power CMOS circuits.

Prasanjeet Das, Sandeep K. Gupta

Proceedings of the 2013 IEEE 31st International Conference on Computer Design, 2013

Using explicit output comparisons for fault tolerant scheduling (FTS) on modern high-performance processors.

Yue Gao, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Design, Automation and Test in Europe, 2013

Trojan detection via delay measurements: a new approach to select paths and vectors to maximize effectiveness and minimize cost.

Byeongju Cha, Sandeep K. Gupta

Proceedings of the Design, Automation and Test in Europe, 2013

An energy and deadline aware resource provisioning, scheduling and optimization framework for cloud systems.

Yue Gao, Yanzhi Wang, Sandeep K. Gupta, Massoud Pedram

Proceedings of the International Conference on Hardware/Software Codesign and System Synthesis, 2013

Interplay of Failure Rate, Performance, and Test Cost in TCAM under Process Variations.

Hsunwei Hsiung, Da Cheng, Bin Liu, Ramesh Govindan, Sandeep K. Gupta

Proceedings of the 22nd Asian Test Symposium, 2013

A New March Test for Process-Variation Induced Delay Faults in SRAMs.

Da Cheng, Hsunwei Hsiung, Bin Liu, Jianing Chen, Jia Zeng, Ramesh Govindan, Sandeep K. Gupta

Proceedings of the 22nd Asian Test Symposium, 2013

2012

A design flow to maximize yield/area of physical devices via redundancy.

Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta

Proceedings of the 2012 IEEE International Test Conference, 2012

Theory of redundancy for logic circuits to maximize yield/area.

Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta, Shahin Nazarian

Proceedings of the Thirteenth International Symposium on Quality Electronic Design, 2012

Towards systematic roadmaps for networked systems.

Bin Liu, Hsunwei Hsiung, Da Cheng, Ramesh Govindan, Sandeep Gupta

Proceedings of the 11th ACM Workshop on Hot Topics in Networks, 2012

A systematic methodology to improve yield per area of highly-parallel CMPs.

Da Cheng, Sandeep K. Gupta

Proceedings of the 2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, 2012

Salvaging chips with caches beyond repair.

Hsunwei Hsiung, Byeongju Cha, Sandeep K. Gupta

Proceedings of the 2012 Design, Automation & Test in Europe Conference & Exhibition, 2012

Efficient Trojan Detection via Calibration of Process Variations.

Byeongju Cha, Sandeep K. Gupta

Proceedings of the 21st IEEE Asian Test Symposium, 2012

2011

A novel software-based defect-tolerance approach for application-specific embedded systems.

Da Cheng, Sandeep Gupta

Proceedings of the IEEE 29th International Conference on Computer Design, 2011

A new circuit simplification method for error tolerant applications.

Doochul Shin, Sandeep K. Gupta

Proceedings of the Design, Automation and Test in Europe, 2011

On Generating Vectors for Accurate Post-Silicon Delay Characterization.

Prasanjeet Das, Sandeep K. Gupta

Proceedings of the 20th IEEE Asian Test Symposium, 2011

Yield-per-Area Optimization for 6T-SRAMs Using an Integrated Approach to Exploit Spares and ECC to Efficiently Combat High Defect and Soft-Error Rates.

Jae Chul Cha, Sandeep K. Gupta

Proceedings of the 20th IEEE Asian Test Symposium, 2011

2010

Modeling the interactions between MAC and higher layer: A systematic approach to generate high-level scenarios from MAC-layer scenarios.

Shamim Begum, Ahmed Helmy, Sandeep Gupta

ACM Trans. Model. Comput. Simul., 2010

Design and test of latch-based circuits to maximize performance, yield, and delay test quality.

Kun Young Chung, Sandeep K. Gupta

Proceedings of the 2011 IEEE International Test Conference, 2010

Approximate logic synthesis for error tolerant applications.

Doochul Shin, Sandeep K. Gupta

Proceedings of the Design, Automation and Test in Europe, 2010

Algorithms to maximize yield and enhance yield/area of pipeline circuitry by insertion of switches and redundant modules.

Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta

Proceedings of the Design, Automation and Test in Europe, 2010

HYPER: A Heuristic for Yield/Area imProvEment Using Redundancy in SoC.

Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta

Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009

Threshold Testing: Improving Yield for Nanoscale VLSI.

Zhigang Jiang, Sandeep K. Gupta

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2009

Efficient Scheduling of Path Delay Tests for Latch-Based Circuits.

Kun Young Chung, Sandeep K. Gupta

Proceedings of the 27th IEEE VLSI Test Symposium, 2009

Modeling and test generation for worst-case performance evaluation of MAC protocols for wireless ad hoc networks.

Shamim Begum, Ahmed Helmy, Sandeep Gupta

Proceedings of the 17th Annual Meeting of the IEEE/ACM International Symposium on Modelling, 2009

Tolerance of performance degrading faults for effective yield improvement.

Tong-Yu Hsieh, Melvin A. Breuer, Murali Annavaram, Sandeep K. Gupta, Kuen-Jong Lee

Proceedings of the 2009 IEEE International Test Conference, 2009

SIRUP: Switch Insertion in RedUndant Pipeline Structures for Yield and Yield/Area Improvement.

Mohammad Mirza-Aghatabar, Melvin A. Breuer, Sandeep K. Gupta

Proceedings of the Eighteentgh Asian Test Symposium, 2009

2008

An Efficient Data-Distribution Mechanism in a Processor-In-Memory (PIM) Architecture Applied to Motion Estimation.

Jung-Yup Kang, Sandeep K. Gupta, Jean-Luc Gaudiot

IEEE Trans. Computers, 2008

An Industrial Case Study of Sticky Path-Delay Faults.

I-De Huang, Yi-Shing Chang, Sandeep K. Gupta, Sreejit Chakravarty

Proceedings of the 26th IEEE VLSI Test Symposium (VTS 2008), April 27, 2008

On Accelerating Path Delay Fault Simulation of Long Test Sequences.

I-De Huang, Yi-Shing Chang, Suriyaprakash Natarajan, Ramesh Sharma, Sandeep K. Gupta

Proceedings of the 2008 IEEE International Test Conference, 2008

Data Partitioning and Placement Schemes for Matrix Multiplications on a PIM Architecture.

Jae Chul Cha, Sandeep K. Gupta

Proceedings of the 7th International Symposium on Parallel and Distributed Computing (ISPDC 2008), 2008

Characterization of granularity and redundancy for SRAMs for optimal yield-per-area.

Jae Chul Cha, Sandeep K. Gupta

Proceedings of the 26th International Conference on Computer Design, 2008

Multi-Vector Tests: A Path to Perfect Error-Rate Testing.

Shideh Shahidi, Sandeep Gupta

Proceedings of the Design, Automation and Test in Europe, 2008

Matrix Inversion on a PIM (Processor-in-Memory).

Jae Chul Cha, Sandeep K. Gupta

Proceedings of the International Conference on Computer Science and Software Engineering, 2008

A Multi-valued Algebra for Capacitance Induced Crosstalk Delay Faults.

Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 17th IEEE Asian Test Symposium, 2008

A Re-design Technique for Datapath Modules in Error Tolerant Applications.

Doochul Shin, Sandeep K. Gupta

Proceedings of the 17th IEEE Asian Test Symposium, 2008

2007

Performance Analysis of Wireless MAC Protocols Using a Search Based Framework.

Shamim Begum, Sandeep Gupta, Ahmed Helmy

Proceedings of the 15th International Symposium on Modeling, 2007

Improving Timing-Independent Testing of Crosstalk Using Realistic Assumptions on Delay Faults.

Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 16th Asian Test Symposium, 2007

On Generating Vectors That Invoke High Circuit Delays - Delay Testing and Dynamic Timing Analysis.

I-De Huang, Sandeep K. Gupta

Proceedings of the 16th Asian Test Symposium, 2007

2006

LT-RTPG: a new test-per-scan BIST TPG for low switching activity.

Seongmoon Wang, Sandeep K. Gupta

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2006

Low-Cost Scan-Based Delay Testing of Latch-Based Circuits with Time Borrowing.

Kun Young Chung, Sandeep K. Gupta

Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

A theory of Error-Rate Testing.

Shideh Shahidi, Sandeep K. Gupta

Proceedings of the 24th International Conference on Computer Design (ICCD 2006), 2006

STAX: statistical crosstalk target set compaction.

Shahin Nazarian, Massoud Pedram, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Conference on Design, Automation and Test in Europe: Designers' Forum, 2006

Diagnosis of delay faults due to resistive bridges, delay variations and defects.

Lei Wang, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 15th Asian Test Symposium, 2006

Test Generation for Weak Resistive Bridges.

Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 15th Asian Test Symposium, 2006

2005

FOTG: fault-oriented stress testing of IP multicast.

Ahmed Helmy, Sandeep Gupta

IEEE Commun. Lett., 2005

Multiple tests for each gate delay fault: higher coverage and lower test application cost.

Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Proceedings 2005 IEEE International Test Conference, 2005

TCP vs. TCP: a systematic study of adverse impact of short-lived TCP flows on long-lived TCP flows.

Shirin Ebrahimi-Taghizadeh, Ahmed Helmy, Sandeep Gupta

Proceedings of the INFOCOM 2005. 24th Annual Joint Conference of the IEEE Computer and Communications Societies, 2005

A Methodology to Compute Bounds on Crosstalk Effects in Arbitrary Interconnects.

Wichian Sirisaengtaksin, Sandeep K. Gupta

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

Threshold testing: Covering bridging and other realistic faults.

Zhigang Jiang, Sandeep K. Gupta

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

Selection of Paths for Delay Testing.

I-De Huang, Sandeep K. Gupta

Proceedings of the 14th Asian Test Symposium (ATS 2005), 2005

2004

The STRESS method for boundary-point performance analysis of end-to-end multicast timer-suppression mechanisms.

Ahmed Helmy, Sandeep Gupta, Deborah Estrin

IEEE/ACM Trans. Netw., 2004

A framework for systematic evaluation of multicast congestion control protocols.

Karim Seada, Ahmed Helmy, Sandeep Gupta

IEEE J. Sel. Areas Commun., 2004

Defect and Error Tolerance in the Presence of Massive Numbers of Defects.

Melvin A. Breuer, Sandeep K. Gupta, T. M. Mak

IEEE Des. Test Comput., 2004

Designing Reconfigurable Multiple Scan Chains for Systems-on-Chip.

Md. Saffat Quasem, Sandeep K. Gupta

Proceedings of the 22nd IEEE VLSI Test Symposium (VTS 2004), 2004

Timing-Independent Testing of Crosstalk in the Presence of Delay Producing Defects Using Surrogate Fault Models.

Shahdad Irajpour, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Proceedings 2004 International Test Conference (ITC 2004), 2004

Accelerating the Kernels of BLAST with an Efficient PIM (Processor-In-Memory) Architecture.

Jung-Yup Kang, Sandeep Gupta, Jean-Luc Gaudiot

Proceedings of the 3rd International IEEE Computer Society Computational Systems Bioinformatics Conference, 2004

Modeling and Simulation for Crosstalk Aggravated by Weak-Bridge Defects between On-Chip Interconnects.

Lei Wang, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004

Modeling and Testing Crosstalk Faults in Inter-Core Interconnects that Include Tri-State and Bi-Directional Nets.

Wichian Sirisaengtaksin, Sandeep K. Gupta

Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004

Efficient Identification of Crosstalk Induced Slowdown Targets.

Melvin A. Breuer, Sandeep K. Gupta, Shahin Nazarian

Proceedings of the 13th Asian Test Symposium (ATS 2004), 2004

2003

Benefits of a SoC-Specific Test Methodology.

Md. Saffat Quasem, Zhigang Jiang, Sandeep K. Gupta

IEEE Des. Test Comput., 2003

Analyzing Crosstalk in the Presence of Weak Bridge Defects.

Shahdad Irajpour, Shahin Nazarian, Lei Wang, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Test Generation for Maximizing Ground Bounce Considering Circuit Delay.

Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Generating Complete and Optimal March Tests for Linked Faults in Memories.

Sultan M. Al-Harbi, Sandeep K. Gupta

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Path-Delay Fault Simulation for Circuits with Large Numbers of Paths for Very Large Test Sets.

Nabil M. Abdulrazzaq, Sandeep K. Gupta

Proceedings of the 21st IEEE VLSI Test Symposium (VTS 2003), 27 April, 2003

Structural Delay Testing of Latch-based High-speed Pipelines with Time Borrowing.

Kun Young Chung, Sandeep K. Gupta

Proceedings of the Proceedings 2003 International Test Conference (ITC 2003), Breaking Test Interface Bottlenecks, 28 September, 2003

An Enhanced Test Generator for Capacitance Induced Crosstalk Delay Faults.

Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003

Designing Multiple Scan Chains for Systems-on-Chip.

Md. Saffat Quasem, Sandeep K. Gupta

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003

A Test Generation Approach for Systems-on-Chip that Use Intellectual Property Cores.

Zhigang Jiang, Sandeep K. Gupta

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003

An Efficient PIM (Processor-In-Memory) Architecture for Motion Estimation.

Jung-Yup Kang, Sandeep Gupta, Saurabh Shah, Jean-Luc Gaudiot

Proceedings of the 14th IEEE International Conference on Application-Specific Systems, 2003

2002

An automatic test pattern generator for minimizing switching activity during scan testing activity.

Seongmoon Wang, Sandeep K. Gupta

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

DS-LFSR: a BIST TPG for low switching activity.

Seongmoon Wang, Sandeep K. Gupta

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

Analytical models for crosstalk excitation and propagation in VLSI circuits.

Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2002

TA-PSV - Timing Analysis for Partially Specified Vectors.

Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer

J. Electron. Test., 2002

Test Generation for Crosstalk-Induced Faults: Framework and Computational Results.

Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer

J. Electron. Test., 2002

XIDEN: Crosstalk Target Identification Framework.

Shahin Nazarian, Hang Huang, Suriyaprakash Natarajan, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

An ATPG for Threshold Testing: Obtaining Acceptable Yield in Future Processes.

Zhigang Jiang, Sandeep K. Gupta

Proceedings of the Proceedings IEEE International Test Conference 2002, 2002

Accurate and Efficient Static Timing Analysis with Crosstalk.

I-De Huang, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 20th International Conference on Computer Design (ICCD 2002), 2002

Enhanced Crosstalk Fault Model and Methodology to Generate Tests for Arbitrary Inter-core Interconnect Topology.

Wichian Sirisaengtaksin, Sandeep K. Gupta

Proceedings of the 11th Asian Test Symposium (ATS 2002), 18-20 November 2002, Guam, USA, 2002

2001

Introducing redundant computations in RTL data paths for reducing BIST resources.

Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer

ACM Trans. Design Autom. Electr. Syst., 2001

Path delay fault diagnosis in combinational circuits with implicitfault enumeration.

Pankaj Pant, Yuan-Chieh Hsu, Sandeep K. Gupta, Abhijit Chatterjee

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2001

Test Generation for Maximizing Ground Bounce for Internal Circuitry with Reconvergent Fan-out.

Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

An Efficient Methodology for Generating Optimal and Uniform March Tests.

Sultan M. Al-Harbi, Sandeep K. Gupta

Proceedings of the 19th IEEE VLSI Test Symposium (VTS 2001), Test and Diagnosis in a Nanometric World, 29 April, 2001

Switch-level delay test of domino logic circuits.

Suriyaprakash Natarajan, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Crosstalk test generation on pseudo industrial circuits: a case study.

Liang-Chi Chen, T. M. Mak, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Proceedings IEEE International Test Conference 2001, Baltimore, MD, USA, 30 October, 2001

Exact fault simulation for systems on Silicon that protects each core's intellectual property.

Md. Saffat Quasem, Sandeep K. Gupta

Proceedings of the Conference on Design, Automation and Test in Europe, 2001

A New Gate Delay Model for Simultaneous Switching and Its Applications.

Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 38th Design Automation Conference, 2001

2000

Novel Test Pattern Generators for Pseudoexhaustive Testing.

Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A. Breuer

IEEE Trans. Computers, 2000

BIST TPG for Combinational Cluster Interconnect Testing at Board Level.

Chen-Huan Chiang, Sandeep K. Gupta

J. Electron. Test., 2000

A Framework to Minimize Test Escape and Yield Loss during IDDQ Testing: A Case Study.

Hugo Cheung, Sandeep K. Gupta

Proceedings of the 18th IEEE VLSI Test Symposium (VTS 2000), 30 April, 2000

New Validation and Test Problems for High Performance Deep Submicron VLSI Circuits.

Melvin A. Breuer, Sandeep K. Gupta

Proceedings of the 13th International Conference on VLSI Design (VLSI Design 2000), 2000

Systematic Testing of Protocol Robustness: Case Studies on Mobile IP and MARS.

Shamim Begum, Meeta Sharma, Ahmed Helmy, Sandeep Gupta

Proceedings of the Proceedings 27th Conference on Local Computer Networks, 2000

Test generation for path-delay faults in one-dimensional iterative logic arrays.

Nabil M. Abdulrazzaq, Sandeep K. Gupta

Proceedings of the Proceedings IEEE International Test Conference 2000, 2000

Systematic testing of multicast routing protocols: analysis of forward and backward search techniques.

Ahmed Helmy, Deborah Estrin, Sandeep Gupta

Proceedings of the Proceedings Ninth International Conference on Computer Communications and Networks, 2000

Systematic Performance Evaluation of Multipoint Protocols.

Ahmed Helmy, Sandeep Gupta, Deborah Estrin, Alberto Cerpa, Yan Yu

Proceedings of the Formal Techniques for Distributed System Development, 2000

BIST TPG for SRAM cluster interconnect testing at board level.

Chen-Huan Chiang, Sandeep K. Gupta

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

Test generation for crosstalk-induced faults: framework and computational result.

Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

A new framework for static timing analysis, incremental timing refinement, and timing simulation.

Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 9th Asian Test Symposium (ATS 2000), 4-6 December 2000, Taipei, Taiwan, 2000

1999

Test Generation for Ground Bounce in Internal Logic Circuitry.

Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 17th IEEE VLSI Test Symposium (VTS '99), 1999

LT-RTPG: a new test-per-scan BIST TPG for low heat dissipation.

Seongmoon Wang, Sandeep K. Gupta

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Switch-level delay test.

Suriyaprakash Natarajan, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Test generation for crosstalk-induced delay in integrated circuits.

Wei-Yu Chen, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

Validation and test generation for oscillatory noise in VLSI interconnects.

Arani Sinha, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 1999 IEEE/ACM International Conference on Computer-Aided Design, 1999

1998

Bounds on pseudoexhaustive test lengths.

Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A. Breuer

IEEE Trans. Very Large Scale Integr. Syst., 1998

ATPG for Heat Dissipation Minimization During Test Application.

Seongmoon Wang, Sandeep K. Gupta

IEEE Trans. Computers, 1998

Estimation of BIST Resources During High-Level Synthesis.

Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer

J. Electron. Test., 1998

Allocation Techniques for Reducing BIST Area Overhead of Data Paths.

Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer

J. Electron. Test., 1998

A Methodology for Transforming Memory Tests for In-System Testing of Direct Mapped Cache Tags.

Sultan M. Al-Harbi, Sandeep K. Gupta

Proceedings of the 16th IEEE VLSI Test Symposium (VTS '98), 28 April, 1998

A new path-oriented effect-cause methodology to diagnose delay failures.

Yuan-Chieh Hsu, Sandeep K. Gupta

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

Test generation in VLSI circuits for crosstalk noise.

Weiyu Chen, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Proceedings IEEE International Test Conference 1998, 1998

Fault-oriented Test Generation for Multicast Routing Protocol Design.

Ahmed Helmy, Deborah Estrin, Sandeep Gupta

Proceedings of the Formal Description Techniques and Protocol Specification, 1998

Process Variations and their Impact on Circuit Operation.

Suriyaprakash Natarajan, Melvin A. Breuer, Sandeep K. Gupta

Proceedings of the 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 1998

Scheduling and Module Assignment for Reducing Bist Resources.

Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 1998 Design, 1998

Introducing Redundant Computations in a Behavior for Reducing BIST Resources.

Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 35th Conference on Design Automation, 1998

An Automatic Test Pattern Generator for At-Speed Robust Path Delay Testing.

Yuan-Chieh Hsu, Sandeep K. Gupta

Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

BIST TPG for Combinational Cluster (Glue Logic) Interconnect Testing at Board Level.

Chen-Huan Chiang, Sandeep K. Gupta

Proceedings of the 7th Asian Test Symposium (ATS '98), 2-4 December 1998, Singapore, 1998

1997

BIST TPGs for Faults in Board Level Interconnect via Boundary Scan.

Chen-Huan Chiang, Sandeep K. Gupta

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

High Quality Robust Tests for Path Delay Faults.

Liang-Chi Chen, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

Analysis of Ground Bounce in Deep Sub-Micron Circuits.

Yi-Shing Chang, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 15th IEEE VLSI Test Symposium (VTS'97), 1997

DS-LFSR: A New BIST TPG for Low Heat Dissipation.

Seongmoon Wang, Sandeep K. Gupta

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

Analytic Models for Crosstalk Delay and Pulse Analysis Under Non-Ideal Inputs.

Weiyu Chen, Melvin A. Breuer, Sandeep K. Gupta

Proceedings of the Proceedings IEEE International Test Conference 1997, 1997

BIST TPG for faults in system backplanes.

Chen-Huan Chiang, Sandeep K. Gupta

Proceedings of the 1997 IEEE/ACM International Conference on Computer-Aided Design, 1997

ATPG for Heat Dissipation Minimization During Scan Testing.

Seongmoon Wang, Sandeep K. Gupta

Proceedings of the 34st Conference on Design Automation, 1997

1996

A Simulator for At-Speed Robust Testing of Path Delay Faults in Combinational Circuits.

Yuan-Chieh Hsu, Sandeep K. Gupta

IEEE Trans. Computers, 1996

Utilization of On-Line (Concurrent) Checkers During Built-In-Self-Test and Vice Versa.

Sandeep K. Gupta, Dhiraj K. Pradhan

IEEE Trans. Computers, 1996

BIST Test Pattern Generators for Two-Pattern Testing-Theory and Design Algorithms.

Chih-Ang Chen, Sandeep K. Gupta

IEEE Trans. Computers, 1996

Fault macromodeling and a testing strategy for opamps.

Chen-Yang Pan, Kwang-Ting Cheng, Sandeep Gupta

J. Electron. Test., 1996

Delay Fault Testing: How Robust are Our Models?

Sandeep K. Gupta, Slawomir Pilarski, Sudhakar M. Reddy, Jacob Savir, Prab Varma

Proceedings of the 14th IEEE VLSI Test Symposium (VTS'96), April 28, 1996

Process-Aggravated Noise (PAN): New Validation and Test Problems.

Melvin A. Breuer, Sandeep K. Gupta

Proceedings of the Proceedings IEEE International Test Conference 1996, 1996

Lower Bounds on Test Resources for Scheduled Data Flow Graphs.

Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 33st Conference on Design Automation, 1996

A Satisfiability-Based Test Generator for Path Delay Faults in Combinational Circuts.

Chih-Ang Chen, Sandeep K. Gupta

Proceedings of the 33st Conference on Design Automation, 1996

1995

Test embedding with discrete logarithms.

Mody Lempel, Sandeep K. Gupta, Melvin A. Breuer

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 1995

Data Path Allocation for Synthesizing RTL Designs with Low BIST Area Overhead.

Ishwar Parulkar, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 32st Conference on Design Automation, 1995

1994

Weighted random robust path delay testing of synthesized multilevel circuits.

Weili Wang, Sandeep K. Gupta

Proceedings of the 12th IEEE VLSI Test Symposium (VTS'94), 1994

A comprehensive fault macromodel for opamps.

Chen-Yang Pan, Kwang-Ting Cheng, Sandeep Gupta

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

Random pattern testable logic synthesis.

Chen-Huan Chiang, Sandeep K. Gupta

Proceedings of the 1994 IEEE/ACM International Conference on Computer-Aided Design, 1994

A Low Cost BIST Methodology and Associated Novel Test Pattern Generator.

Sen-Pin Lin, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

BIST Test Pattern Generators for Stuck-Open and Delay Testing.

Chih-Ang Chen, Sandeep K. Gupta

Proceedings of the EDAC - The European Conference on Design Automation, ETC - European Test Conference, EUROASIC - The European Event in ASIC Design, Proceedings, February 28, 1994

Clock Grouping: A Low Cost DFT Methodology for Delay Testing.

Wen-Chang Fang, Sandeep K. Gupta

Proceedings of the 31st Conference on Design Automation, 1994

1993

Novel Test Pattern Generators for Pseudo-Exhaustive Testing.

Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the Proceedings IEEE International Test Conference 1993, Designing, Testing, and Diagnostics, 1993

An Efficient Partitioning Strategy for Pseudo-Exhaustive Testing.

Rajagopalan Srinivasan, Sandeep K. Gupta, Melvin A. Breuer

Proceedings of the 30th Design Automation Conference. Dallas, 1993

1992

Recent advances in BIST.

Sandeep K. Gupta

Proceedings of the 10th IEEE VLSI Test Symposium (VTS'92), 1992

Can Concurrent Checkers Help BIST?

Sandeep K. Gupta, Dhiraj K. Pradhan

Proceedings of the Proceedings IEEE International Test Conference 1992, 1992

1991

A New Framework for Designing and Analyzing BIST Techniques and Zero Aliasing Compression.

Dhiraj K. Pradhan, Sandeep K. Gupta

IEEE Trans. Computers, 1991

Aliasing and Diagnosis Probability in MISR and STUMPS Using a General Error Model.

Mark G. Karpovsky, Sandeep K. Gupta, Dhiraj K. Pradhan

Proceedings of the Proceedings IEEE International Test Conference 1991, 1991

1990

Aliasing Probability for Multiple Input Signature Analyzer.

Dhiraj K. Pradhan, Sandeep K. Gupta, Mark G. Karpovsky

IEEE Trans. Computers, 1990

Zero aliasing compression.

Sandeep K. Gupta, Dhiraj K. Pradhan, Sudhakar M. Reddy

Proceedings of the 20th International Symposium on Fault-Tolerant Computing, 1990

1988

A New Framework for Designing and Analyzing BIST Techniques: Computation of Exact Aliasing Probability.

Sandeep K. Gupta, Dhiraj K. Pradhan

Proceedings of the Proceedings International Test Conference 1988, 1988

Concurrent Control of Multiple BIT Structures.

Sandeep K. Gupta, Melvin A. Breuer, Jung-Cheun Lien

Proceedings of the Proceedings International Test Conference 1988, 1988