Soumya Banerjee

Affiliations:

University of Illinois at Chicago, Department of Electrical and Computer Engineering, IL, USA

According to our database¹, Soumya Banerjee authored at least 7 papers between 2013 and 2017.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of four.

Timeline

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Bibliography

2017

A General Design Framework for Sparse Parallel Prefix Adders.

[BibT_eX]

[DOI]

Soumya Banerjee

Wenjing Rao

Proceedings of the 2017 IEEE Computer Society Annual Symposium on VLSI, 2017

The Existence of Universally Agreed Fairest Semi-matchings in Any Given Bipartite Graph.

[BibT_eX]

[DOI]

Jian Xu

Soumya Banerjee

Wenjing Rao

Proceedings of the Computing and Combinatorics - 23rd International Conference, 2017

A local reconfiguration based scalable fault tolerant many-processor array.

[BibT_eX]

[DOI]

Soumya Banerjee

Wenjing Rao

Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2016

An STT-MRAM based strong PUF.

[BibT_eX]

[DOI]

Proceedings of the IEEE/ACM International Symposium on Nanoscale Architectures, 2016

A general approach for highly defect tolerant Parallel Prefix Adder design.

[BibT_eX]

[DOI]

Soumya Banerjee

Wenjing Rao

Proceedings of the 2016 Design, Automation & Test in Europe Conference & Exhibition, 2016

2015

On the conditions of guaranteed k-fault tolerant systems supporting on-the-fly repairs.

[BibT_eX]

[DOI]

Soumya Banerjee

Wenjing Rao

Proceedings of the 33rd IEEE International Conference on Computer Design, 2015

2013

Decentralized self-balancing systems.

[BibT_eX]

[DOI]

Proceedings of the 21st IEEE/IFIP International Conference on VLSI and System-on-Chip, 2013

Soumya Banerjee

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