Sriram Vajapeyam

According to our database1, Sriram Vajapeyam authored at least 16 papers between 1987 and 2014.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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Bibliography

2014
Understanding Shannon's Entropy metric for Information.
CoRR, 2014

2002
Page-Level Behavior of Cache Contention.
IEEE Comput. Archit. Lett., 2002

2001
Early 21st Century Processors - Guest Editors' Introduction.
Computer, 2001

2000
Non-Strict Cache Coherence: Exploiting Data-Race Tolerance in Emerging Applications.
Proceedings of the 2000 International Conference on Parallel Processing, 2000

1999
Dynamic Vectorization: A Mechanism for Exploiting Far-Flung ILP in Ordinary Programs.
Proceedings of the 26th Annual International Symposium on Computer Architecture, 1999

Whither Indian Computer Science R & D?
Proceedings of the High Performance Computing, 1999

1998
Load Balancing in a Heterogeneous Computing Environment.
Proceedings of the Thirty-First Annual Hawaii International Conference on System Sciences, 1998

1997
Trace Processors: Moving to Fourth-Generation Microarchitectures.
Computer, 1997

Improving Superscalar Instruction Dispatch and Issue by Exploiting Dynamic Code Sequences.
Proceedings of the 24th International Symposium on Computer Architecture, 1997

1996
Program-level control of network delay for parallel asynchronous iterative applications.
Proceedings of the 3rd International Conference on High Performance Computing, 1996

1993
Toward Effective Scalar Hardware for Highly Vectorizable Applications.
J. Parallel Distributed Comput., 1993

1992
On the instruction-level characteristics of scalar code in highly-vectorized scientific applications.
Proceedings of the 25th Annual International Symposium on Microarchitecture, 1992

1991
An Empirical Study of the CRAY Y-MP Processor Using the Perfect Club Benchmarks.
Proceedings of the 18th Annual International Symposium on Computer Architecture. Toronto, 1991

1990
Exploitation of operation-level parallelism in a processor of the CRAY X-MP.
Proceedings of the 1990 IEEE International Conference on Computer Design: VLSI in Computers and Processors, 1990

1989
Tradeoffs in Instruction Format Design for Horizontal Architectures.
Proceedings of the ASPLOS-III Proceedings, 1989

1987
Instruction Issue Logic for High-Performance, Interruptable Pipelined Processors.
Proceedings of the 14th Annual International Symposium on Computer Architecture. Pittsburgh, 1987


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