Stefano Tulisi

According to our database, Stefano Tulisi authored at least 4 papers between 2019 and 2024.

Collaborative distances:

• Dijkstra number of three.
• Erdős number of four.

2024

10.4 A 45.5fs-Integrated-Random-Jitter and -75dBc-Integer-Boundary-Spur BiCMOS Fractional-N PLL with Suppression of Fractional, Horn, and Wandering Spurs.

Michael Peter Kennedy, Valerio Mazzaro, Stefano Tulisi, Micheál Scully, Niall McDermott, James Breslin

Proceedings of the IEEE International Solid-State Circuits Conference, 2024

2022

Wandering Spur Suppression in a 4.9-GHz Fractional-N Frequency Synthesizer.

Dawei Mai, Yann Donnelly, Michael Peter Kennedy, Stefano Tulisi, James Breslin, Patrick Griffin, Michael Connor, Stephen Brookes, Brian Shelly, Mike Keaveney

IEEE J. Solid State Circuits, 2022

2021

Experimental Verification of Wandering Spur Suppression Technique in a 4.9 GHz Fractional-N Frequency Synthesizer.

Dawei Mai, Yann Donnelly, Michael Peter Kennedy, Stefano Tulisi, James Breslin, Patrick Griffin, Michael Connor, Stephen Brookes, Brian Shelly, Michael Keaveney

Proceedings of the 47th ESSCIRC 2021, 2021

2019

4.48GHz 0.18μm SiGe BiCMOS Exact-Frequency Fractional-N Frequency Synthesizer with Spurious-Tone Suppression Yielding a -80dBc In-Band Fractional Spur.

Michael Peter Kennedy, Yann Donnelly, James Breslin, Stefano Tulisi, Sanganagouda Patil, Ciaran Curtin, Stephen Brookes, Brian Shelly, Patrick Griffin, Michael Keaveney

Proceedings of the IEEE International Solid- State Circuits Conference, 2019