Subramania Sudharsanan

According to our database1, Subramania Sudharsanan authored at least 11 papers between 2000 and 2009.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

2009
Scalable high-throughput variable block size motion estimation architecture.
Microprocess. Microsystems, 2009

Performance optimization and parallelization of turbo decoding for software-defined radio.
Proceedings of the 22nd Canadian Conference on Electrical and Computer Engineering, 2009

2007
Architecture for Multiple Reference Frame Variable Block Size Motion Estimation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

2006
Performance improvement of the H.264/AVC deblocking filter using SIMD instructions.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Scalable high-throughput architecture for H.264/AVC variable block size motion estimation.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Enhanced Architectural Support for Variable-Length Decoding.
Proceedings of the 2006 IEEE International Conference on Multimedia and Expo, 2006

2005
Shared key encryption of JPEG color images.
IEEE Trans. Consumer Electron., 2005

2004
Topic 12: High Performance Multimedia.
Proceedings of the Euro-Par 2004 Parallel Processing, 2004

2000
MAJC-5200: A High Performance Microprocessor for Multimedia Computing.
Proceedings of the Parallel and Distributed Processing, 2000

Image and Video Processing Using MAJC 5200.
Proceedings of the 2000 International Conference on Image Processing, 2000

Block-Based Adaptive Lossless Image Coder.
Proceedings of the 2000 International Conference on Image Processing, 2000


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