Suiyang Liu

Orcid: 0000-0002-9403-6578

According to our database¹, Suiyang Liu authored at least 10 papers between 2023 and 2026.

Collaborative distances:

Dijkstra number² of five.
Erdős number³ of five.

Timeline

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Book In proceedings Article PhD thesis Dataset Other

Links

On csauthors.net:

Bibliography

2026

A 64-Mpixel 13-bit 610-frames/s CMOS Image Sensor With 11-fJ/Step TDC Assisted Pipelined Column-Parallel ADC.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. I Regul. Pap., May, 2026

A 200 ns row time area-efficient Pipelined-SAR ADC with globally shared reference voltage for CMOS image sensors.

[BibT_eX]

[DOI]

Microelectron. J., 2026

A 94.52 dBc SFDR 89.86 dB SNDR high-linearity bootstrapped switch for SAR ADC.

[BibT_eX]

[DOI]

IEICE Electron. Express, 2026

2025

A High-Speed Dual Feedback Loop Column Buffer for Ultra Large Pixel Array CMOS Image Sensors.

[BibT_eX]

[DOI]

IEEE Trans. Circuits Syst. II Express Briefs, September, 2025

An 85 mm×89 mm 64M pixel high-speed CMOS image sensor with a negative capacitance circuit.

[BibT_eX]

[DOI]

Sci. China Inf. Sci., 2025

2024

Synchronous Driving Method for Stitching Pixel Arrays Based on an Adaptive Correction Technique.

[BibT_eX]

[DOI]

Sensors, March, 2024

A high consistency ramp circuit design method for negative feedback adaptive adjustment mechanism applied to large area array CMOS image sensors.

[BibT_eX]

[DOI]

Sci. China Inf. Sci., 2024

2023

High Dynamic Pixel Structure Based on an Adaptive Integrating Capacitor.

[BibT_eX]

[DOI]

Sensors, November, 2023

High-Linearity and High-Speed ROIC of Ultra-Large Array Infrared Detectors Based on Adaptive Compensation and Enhancement.

[BibT_eX]

[DOI]

Sensors, 2023

A high-speed 13-bit two-step single-slope ADC for large array CMOS image sensors.

[BibT_eX]

[DOI]

Integr., 2023

Suiyang Liu

Timeline

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Links

On csauthors.net:

Bibliography

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