Sumit Roy

Affiliations:
  • Magma Design Automation
  • Cadence Design Systems
  • University of Illinois at Urbana-Champaign, IL, USA


According to our database1, Sumit Roy authored at least 11 papers between 1995 and 2003.

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Bibliography

2003
RTL Power Optimization with Gate-Level Accuracy.
Proceedings of the 2003 International Conference on Computer-Aided Design, 2003

Power minimization by clock root gating.
Proceedings of the 2003 Asia and South Pacific Design Automation Conference, 2003

1999
An Approxmimate Algorithm for Delay-Constraint Technology Mapping.
Proceedings of the 36th Conference on Design Automation, 1999

1998
Low-Power-Driven Synthesis Algorithms for Sequential and Combinational Circuits
PhD thesis, 1998

Partitioning sequential circuits for low power.
Proceedings of the 11th International Conference on VLSI Design (VLSI Design 1991), 1998

A low-power logic optimization methodology based on a fast power-driven mapping.
Proceedings of the International Conference on Computer Design: VLSI in Computers and Processors, 1998

PowerDrive: a fast, canonical POWER estimator for DRIVing synthEsis.
Proceedings of the 1998 IEEE/ACM International Conference on Computer-Aided Design, 1998

PowerShake: A Low Power Driven Clustering and Factoring Methodology for Boolean Expressions.
Proceedings of the 1998 Design, 1998

1997
A Comparison of Parallel Approaches for Algebraic Factorization in Logic Synthesis.
Proceedings of the 11th International Parallel Processing Symposium (IPPS '97), 1997

Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors.
Proceedings of the 11th international conference on Supercomputing, 1997

1995
Parallel algorithms for logic synthesis using the MIS approach.
Proceedings of IPPS '95, 1995


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