Sunghyuk Lee

According to our database, Sunghyuk Lee authored at least 5 papers between 2011 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2014

Techniques for low-power high-performance analog-to-digital converters.

Sunghyuk Lee

PhD thesis, 2014

A 1 GS/s 10b 18.9 mW Time-Interleaved SAR ADC With Background Timing Skew Calibration.

Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee

IEEE J. Solid State Circuits, 2014

22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration.

Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee

Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2012

A 12 b 5-to-50 MS/s 0.5-to-1 V Voltage Scalable Zero-Crossing Based Pipelined ADC.

Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee

IEEE J. Solid State Circuits, 2012

2011

A 12b 5-to-50MS/s 0.5-to-1V voltage scalable zero-crossing based pipelined ADC.

Sunghyuk Lee, Anantha P. Chandrakasan, Hae-Seung Lee

Proceedings of the 37th European Solid-State Circuits Conference, 2011