Hae-Seung Lee

Affiliations:
  • Massachusetts Institute of Technology, Cambridge, USA


According to our database1, Hae-Seung Lee authored at least 55 papers between 1992 and 2021.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Awards

IEEE Fellow

IEEE Fellow 1996, "For contributions to CMOS high accuracy data converters.".

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2021
Non-Invasive Evaluation of a Carotid Arterial Pressure Waveform Using Motion-Tolerant Ultrasound Measurements During the Valsalva Maneuver.
IEEE J. Biomed. Health Informatics, 2021

S2ADC: A 12-bit, 1.25-MS/s Secure SAR ADC With Power Side-Channel Attack Resistance.
IEEE J. Solid State Circuits, 2021

2020
GCN-RL Circuit Designer: Transferable Transistor Sizing with Graph Neural Networks and Reinforcement Learning.
Proceedings of the 57th ACM/IEEE Design Automation Conference, 2020

S2ADC: A 12-bit, 1.25MS/s Secure SAR ADC with Power Side-Channel Attack Resistance.
Proceedings of the 2020 IEEE Custom Integrated Circuits Conference, 2020

2019
An 8-bit 2.8 GS/s Flash ADC with Time-based Offset Calibration and Interpolation in 65 nm CMOS.
Proceedings of the 45th IEEE European Solid State Circuits Conference, 2019

2018
Learning to Design Circuits.
CoRR, 2018

Design of a 6<sup>th</sup>-order Continuous-time Bandpass Delta-Sigma Modulator with 250 MHz IF, 25 MHz Bandwidth, and over 75 dB SNDR.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Recode then LSB-first SAR ADC for Reducing Energy and Bit-cycles.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2018

Monitoring of Pulse Pressure and Arterial Pressure Waveform Changes during the Valsalva Maneuver by a Portable Ultrasound System.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

EMG-based Real Time Facial Gesture Recognition for Stress Monitoring.
Proceedings of the 40th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2018

2017
0.3 V ultra-low power sensor interface for EMG.
Proceedings of the 43rd IEEE European Solid State Circuits Conference, 2017

2016
A Column-Row-Parallel ASIC Architecture for 3-D Portable Medical Ultrasonic Imaging.
IEEE J. Solid State Circuits, 2016

Design of a 4th-order multi-stage feedforward operational amplifier for continuous-time bandpass delta sigma modulators.
Proceedings of the IEEE International Symposium on Circuits and Systems, 2016

A Sampling Clock Skew Correction Technique for Time-Interleaved SAR ADCs.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

Data converter reflections: 19 papers from the last ten years that deserve a second look.
Proceedings of the ESSCIRC Conference 2016: 42<sup>nd</sup> European Solid-State Circuits Conference, 2016

2015
A Continuous-Time Sturdy-MASH ΔΣ Modulator in 28 nm CMOS.
IEEE J. Solid State Circuits, 2015

A 12b 250 MS/s Pipelined ADC With Virtual Ground Reference Buffers.
IEEE J. Solid State Circuits, 2015

15.1 An 85dB-DR 74.6dB-SNDR 50MHZ-BW CT MASH ΔΣ modulator in 28nm CMOS.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Session 26 overview: Nyquist-rate converters: Data converters subcommittee.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

15.6 12b 250MS/S pipelined ADC with virtual ground reference buffers.
Proceedings of the 2015 IEEE International Solid-State Circuits Conference, 2015

Carotid arterial blood pressure waveform monitoring using a portable ultrasound system.
Proceedings of the 37th Annual International Conference of the IEEE Engineering in Medicine and Biology Society, 2015

A 200-MS/s 98-dB SNR track-and-hold in 0.25-um GaN HEMT.
Proceedings of the 2015 IEEE Custom Integrated Circuits Conference, 2015

2014
A 12 bit 200 MS/s Zero-Crossing-Based Pipelined ADC With Early Sub-ADC Decision and Output Residue Background Calibration.
IEEE J. Solid State Circuits, 2014

A 1 GS/s 10b 18.9 mW Time-Interleaved SAR ADC With Background Timing Skew Calibration.
IEEE J. Solid State Circuits, 2014

A Column-Row-Parallel ASIC architecture for 3D wearable / portable medical ultrasonic imaging.
Proceedings of the Symposium on VLSI Circuits, 2014

22.4 A 1GS/s 10b 18.9mW time-interleaved SAR ADC with background timing-skew calibration.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

11.6 A 21mW 15b 48MS/s zero-crossing pipeline ADC in 0.13μm CMOS with 74dB SNDR.
Proceedings of the 2014 IEEE International Conference on Solid-State Circuits Conference, 2014

2013
Ultrasonic Imaging Transceiver Design for CMUT: A Three-Level 30-Vpp Pulse-Shaping Pulser With Improved Efficiency and a Noise-Optimized Receiver.
IEEE J. Solid State Circuits, 2013

Power-efficient amplifier frequency compensation for continuous-time delta-sigma modulators.
Proceedings of the IEEE 56th International Midwest Symposium on Circuits and Systems, 2013

A 12b 50MS/s 2.1mW SAR ADC with redundancy and digital background calibration.
Proceedings of the ESSCIRC 2013, 2013

2012
A 12 b 5-to-50 MS/s 0.5-to-1 V Voltage Scalable Zero-Crossing Based Pipelined ADC.
IEEE J. Solid State Circuits, 2012

A 2.9-mW 11-b 20-MS/s pipelined ADC with dual-mode-based digital background calibration.
Proceedings of the 38th European Solid-State Circuit conference, 2012

A 12b 200MS/s frequency scalable zero-crossing based pipelined ADC in 55nm CMOS.
Proceedings of the IEEE 2012 Custom Integrated Circuits Conference, 2012

2011
Zero-Crossing Detector Based Reconfigurable Analog System.
IEEE J. Solid State Circuits, 2011

Redundancy in SAR ADCs.
Proceedings of the 21st ACM Great Lakes Symposium on VLSI 2010, 2011

A 12b 5-to-50MS/s 0.5-to-1V voltage scalable zero-crossing based pipelined ADC.
Proceedings of the 37th European Solid-State Circuits Conference, 2011

2010
Zero-Crossing-Based Ultra-Low-Power A/D Converters.
Proc. IEEE, 2010

Offset cancellation for zero crossing based circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
Noise Analysis for Comparator-Based Circuits.
IEEE Trans. Circuits Syst. I Regul. Pap., 2009

A 12b, 50 MS/s, Fully Differential Zero-Crossing Based Pipelined ADC.
IEEE J. Solid State Circuits, 2009

A 12b 50MS/s fully differential zero-crossing-based ADC without CMFB.
Proceedings of the IEEE International Solid-State Circuits Conference, 2009

2008
Digital Background Calibration in Pipelined ADCs Using Commutated Feedback Capacitor Switching.
IEEE Trans. Circuits Syst. II Express Briefs, 2008

Background Calibration of Pipelined ADCs Via Decision Boundary Gap Estimation.
IEEE Trans. Circuits Syst. I Regul. Pap., 2008

Analog-to-Digital Converters: Digitizing the Analog World.
Proc. IEEE, 2008

A 16b 10MS/s digitally self-calibrated ADC with time constant control.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

A 101-dB SNR hybrid delta-sigma audio ADC using post integration time control.
Proceedings of the IEEE 2008 Custom Integrated Circuits Conference, 2008

2007
A Zero-Crossing-Based 8-bit 200 MS/s Pipelined ADC.
IEEE J. Solid State Circuits, 2007

A Zero-Crossing-Based 8b 200MS/s Pipelined ADC.
Proceedings of the 2007 IEEE International Solid-State Circuits Conference, 2007

Transient Noise Analysis for Comparator-Based Switched-Capacitor Circuits.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2007), 2007

A 14-b 30MS/s 0.75mm<sup>2</sup> Pipelined ADC with On-Chip Digital Self-Calibration.
Proceedings of the IEEE 2007 Custom Integrated Circuits Conference, 2007

2006
Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies.
IEEE J. Solid State Circuits, 2006

A 3MPixel Low-Noise Flexible Architecture CMOS Image Sensor.
Proceedings of the 2006 IEEE International Solid State Circuits Conference, 2006

2003
Output impedance requirements for DACs.
Proceedings of the 2003 International Symposium on Circuits and Systems, 2003

1998
Estimating the Focus of Expansion in Analog VLSI.
Int. J. Comput. Vis., 1998

1992
Analog VLSI systems for image acquisition and fast early vision processing.
Int. J. Comput. Vis., 1992


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