Suresh Alapati

Orcid: 0000-0002-1438-1954

According to our database1, Suresh Alapati authored at least 6 papers between 2014 and 2023.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
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Links

On csauthors.net:

Bibliography

2023
Simulation of an Elastic Rod Whirling Instabilities by Using the Lattice Boltzmann Method Combined with an Immersed Boundary Method.
Axioms, November, 2023

2018
Capacitor Less Voltage Regulator with Split Drive Error Amplifier for Segmented Pass Transistors.
J. Low Power Electron., 2018

Improved transient response capacitor less low dropout regulator employing adaptive bias and bulk modulation.
Turkish J. Electr. Eng. Comput. Sci., 2018

2017
An Adaptively Biased Capacitor-Less Low Dropout Regulator with Improved Transient Performance.
J. Circuits Syst. Comput., 2017

2014
250mA ultra low drop out regulator with high slew rate double recycling folded cascode error amplifier.
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014

A Transient-Enhanced Capacitorless LDO Regulator with improved Error Amplifier.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014


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