Sreehari Rao Patri

Orcid: 0000-0003-4061-4851

According to our database1, Sreehari Rao Patri authored at least 29 papers between 2008 and 2024.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of five.

Timeline

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Bibliography

2024
A sub-μW Fully Integrated Compact CMOS Temperature Sensor for Passive RFID Applications.
Proceedings of the 37th International Conference on VLSI Design and 23rd International Conference on Embedded Systems, 2024

2023
A 0.5V Energy Efficient All CMOS Temperature Sensor for IoT Applications.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

A High Gain Narrow Band CMOS LNA suitable for L1 and L5 band of Frequencies.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2023

2022
An Ultra-Low-Power, Self-Start-Up DC-DC Boost Converter for Self-Powered IoT Node.
J. Circuits Syst. Comput., 2022

Design A Robust Narrow Band Low Noise Amplifier at 1.176 GHz.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Fair-Energy Efficient Power Allocation for NOMA Downlink System.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Object Detection and Classification in FWMAVs for Smart Pollination.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

A Process-Voltage-Temperature insensitive hybrid Voltage controlled ring oscillator for Biomedical IoT node.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

The chaotic-based challenge feed mechanism for Arbiter Physical Unclonable Functions (APUFs) with enhanced reliability in IoT security.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Adaptively Biased Low dropout regulator with High Power Supply Rejection for High speed serial Links.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

A 10-MHz CMOS-based Ring Oscillator with Low Power consumption For On-chip IC Applications.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Efficient successive cancellation decoder architecture for multi-kernel polar codes.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

Accurate Data Acquisition Circuit for MEMS Accelerometer.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2022

2021
Highly reliable XoR Feed Arbiter Physical Unclonable Function (XFAPUF) in 180 nm process for IoT security.
Microprocess. Microsystems, November, 2021

Power-efficient voltage up level shifter with low power-delay product.
Int. J. Circuit Theory Appl., 2021

2019
Optimal Circuit Design and Sizing Methodology Using Multiobjective WOA-mGWO Algorithm.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

A Multi VDD Wide Voltage Range Up Level Shifter for Smart SoC Applications.
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2019

2018
Capacitor Less Voltage Regulator with Split Drive Error Amplifier for Segmented Pass Transistors.
J. Low Power Electron., 2018

An enhanced grey wolf optimization algorithm with improved exploration ability for analog circuit design automation.
Turkish J. Electr. Eng. Comput. Sci., 2018

Improved transient response capacitor less low dropout regulator employing adaptive bias and bulk modulation.
Turkish J. Electr. Eng. Comput. Sci., 2018

2017
An Adaptively Biased Capacitor-Less Low Dropout Regulator with Improved Transient Performance.
J. Circuits Syst. Comput., 2017

Low-power voltage to a frequency-based smart temperature sensor with +0.8/-0.75 $^{\circ}$C accuracy for -55 $^{\circ}$C to 125 $^{\circ}$C.
Turkish J. Electr. Eng. Comput. Sci., 2017

An ultralow power, 0.003-mm$^{2}$ area, voltage to frequency-based smart temperature sensor for -55 $^{\circ}$C to +125 $^{\circ}$C with one-point calibration.
Turkish J. Electr. Eng. Comput. Sci., 2017

A Low Power, Frequency-to-Digital Converter CMOS Based Temperature Sensor in 65 nm Process.
Proceedings of the VLSI Design and Test - 21st International Symposium, 2017

2015
High speed self biased current sense amplifier for low power CMOS SRAM's.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

On-chip CMOS temperature sensor with current calibrated accuracy of -1.1°C to +1.4°C (3σ) from -20°C to 150°C.
Proceedings of the 19th International Symposium on VLSI Design and Test, 2015

2014
Power optimized PLL implementation in 180nm CMOS technology.
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014

250mA ultra low drop out regulator with high slew rate double recycling folded cascode error amplifier.
Proceedings of the 18th International Symposium on VLSI Design and Test, 2014

2008
A Robust Low-Voltage On-Chip LDO Voltage Regulator in 180 nm.
VLSI Design, 2008


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