T. S. Bindiya
Orcid: 0000-0002-8406-1833
According to our database1,
T. S. Bindiya
authored at least 24 papers
between 2014 and 2024.
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Bibliography
2024
Approximate Multiplier Design With LFSR-Based Stochastic Sequence Generators for Edge AI.
IEEE Comput. Archit. Lett., 2024
2023
Realization and Hardware Implementation of Gating Units for Long Short-Term Memory Network Using Hyperbolic Sine Functions.
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., December, 2023
Power and Delay-Efficient Matrix Vector Multiplier Units for the LSTM Networks Using Activity Span Reduction Technique and Recursive Adders.
Circuits Syst. Signal Process., December, 2023
Circuits Syst. Signal Process., November, 2023
Development of variable 2D FIR filter structures using farrow approximation and row-wise polyphase decomposition.
Digit. Signal Process., September, 2023
Design of cost effective variable bandwidth 2D low-pass, high-pass and band-pass filters with improved circularity.
Digit. Signal Process., March, 2023
Development of a 2D Filter Architecture to Obtain Circular Bandwidths Varied by Arbitrary Rational Values Without Restructuring.
Circuits Syst. Signal Process., 2023
2022
Multidimens. Syst. Signal Process., 2022
Design of Hardware Efficient Reconfigurable Merged Partial Cosine Modulated Non-uniform Filter Bank Channelizer and its Power Efficient Implementation Using a Novel Approximation Algorithm.
Circuits Syst. Signal Process., 2022
2021
Design of Reconfigurable FRM Channelizer using Resource Shared Non-maximally Decimated Masking Filters.
J. Signal Process. Syst., 2021
High Speed and Power Efficient Multiplexer based Matrix Vector Multiplication for LSTM Network.
Proceedings of the 25th International Symposium on VLSI Design and Test, 2021
2020
Analysis of Different Rational Decimated Filter Banks Derived From the Same Set of Prototype Filters.
IEEE Trans. Signal Process., 2020
Design of Low-Complex Linear-Phase Non-uniform Filter Bank to Realize Wavelet Approximation of Bark Frequency Partitioning for Real-Time Applications.
Circuits Syst. Signal Process., 2020
Proceedings of the 12th International Symposium on Communication Systems, 2020
2019
Design of Power Efficient Variable Bandwidth Non-Maximally Decimated FRM Filters for Wideband Channelizer.
IEEE Trans. Circuits Syst. II Express Briefs, 2019
Design of a Power-Efficient Low-Complexity Reconfigurable Non-maximally Decimated Filter Bank for High-Resolution Wideband Channels.
Circuits Syst. Signal Process., 2019
Low-complexity implementation of efficient reconfigurable structure for cost-effective hearing aids using fractional interpolation.
Comput. Electr. Eng., 2019
Design and Implementation of Maximally Decimated Polyphase Filter Bank for Power and Delay Efficient Digital Hearing Aids.
Proceedings of the TENCON 2019, 2019
A New Multiplier-free Transformation for the Design of Hardware Efficient Circularly Symmetric Wideband 2D Filters.
Proceedings of the TENCON 2019, 2019
2018
Design and implementation of reconfigurable filter bank structure for low complexity hearing aids using 2-level sound wave decomposition.
Biomed. Signal Process. Control., 2018
2017
Reconfigurable Non-Maximally Decimated Filter Bank based wideband channelizer for VLBI.
Proceedings of the 30th IEEE Canadian Conference on Electrical and Computer Engineering, 2017
2016
Meta-heuristic evolutionary algorithms for the design of optimal multiplier-less recombination filter banks.
Inf. Sci., 2016
2014
Metaheuristic algorithms for the design of multiplier-less non-uniform filter banks based on frequency response masking.
Soft Comput., 2014
Modified Metaheuristic Algorithms for the Optimal Design of Multiplier-Less Non-uniform Channel Filters.
Circuits Syst. Signal Process., 2014