T. S. Ganesh

According to our database, T. S. Ganesh authored at least 6 papers between 2004 and 2009.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of three.

2009

Greedy Dynamic Crossover Management in Hardware Accelerated Genetic Algorithm Implementations Using FPGA.

Shubhalaxmi Kher, T. S. Ganesh, Prem Ramesh, Arun K. Somani

Proceedings of the UKSim'11, 2009

2007

Hashchip: A shared-resource multi-hash function processor architecture on FPGA.

T. S. Ganesh, Michael T. Frederick, T. S. B. Sudarshan, Arun K. Somani

Integr., 2007

2006

SEU Mitigation Techniques for Microprocessor Control Logic.

T. S. Ganesh, Viswanathan Subramanian, Arun K. Somani

Proceedings of the Sixth European Dependable Computing Conference, 2006

2005

ASIC Implementation of a Unified Hardware Architecture for Non-Key Based Cryptographic Hash Primitives.

T. S. Ganesh, T. S. B. Sudarshan

Proceedings of the International Symposium on Information Technology: Coding and Computing (ITCC 2005), 2005

Caching and replacement of streaming objects based on a popularity function.

T. S. B. Sudarshan, T. S. Ganesh, G. Raghurama

Proceedings of the Third IASTED International Conference on Communications and Computer Networks, 2005

2004

Pre-silicon prototyping of a unified hardware architecture for cryptographic manipulation detection codes.

T. S. Ganesh, T. S. B. Sudarshan, Naveen Kumar Srinivasan, Karthick Jayapal

Proceedings of the 2004 IEEE International Conference on Field-Programmable Technology, 2004