T. S. Manivannan

Orcid: 0000-0002-3453-8162

According to our database1, T. S. Manivannan authored at least 2 papers between 2018 and 2024.

Collaborative distances:
  • Dijkstra number2 of six.
  • Erdős number3 of five.

Timeline

Legend:

Book 
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Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2024
Optimization of DE-QG TFET using novel CIP and DCT techniques.
Microelectron. J., February, 2024

2018
A Novel Design Approach to Implement Multi-port Register Files Using Pulsed-Latches.
Proceedings of the VLSI Design and Test - 22nd International Symposium, 2018


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