Tak-Yung Kim

According to our database, Tak-Yung Kim authored at least 5 papers between 2010 and 2013.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2013

Resource Allocation and Design Techniques of Prebond Testable 3-D Clock Tree.

Tak-Yung Kim, Taewhan Kim

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst., 2013

2011

Clock Tree synthesis for TSV-based 3D IC designs.

Tak-Yung Kim, Taewhan Kim

ACM Trans. Design Autom. Electr. Syst., 2011

2010

Bounded skew clock routing for 3D stacked IC designs: Enabling trade-offs between power and clock skew.

Tak-Yung Kim, Taewhan Kim

Proceedings of the International Green Computing Conference 2010, 2010

Clock tree synthesis with pre-bond testability for 3D stacked IC designs.

Tak-Yung Kim, Taewhan Kim

Proceedings of the 47th Design Automation Conference, 2010

Clock tree embedding for 3D ICs.

Tak-Yung Kim, Taewhan Kim

Proceedings of the 15th Asia South Pacific Design Automation Conference, 2010