Tariq B. Ahmad

According to our database, Tariq B. Ahmad authored at least 5 papers between 2011 and 2014.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of three.

2014

Parallel Multi-core Verilog HDL Simulation Using Domain Partitioning.

Tariq B. Ahmad, Maciej J. Ciesielski

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

Fast time-parallel C-based event-driven RTL simulation.

Tariq Bashir Ahmad, Maciej J. Ciesielski

Proceedings of the 17th International Symposium on Design and Diagnostics of Electronic Circuits & Systems, 2014

Fast STA prediction-based gate-level timing simulation.

Tariq B. Ahmad, Maciej J. Ciesielski

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2014

2013

An Approach to Multi-core Functional Gate-Level Simulation Minimizing Synchronization and Communication Overheads.

Tariq Bashir Ahmad, Maciej J. Ciesielski

Proceedings of the 14th International Workshop on Microprocessor Test and Verification, 2013

2011

Algebraic approach to arithmetic design verification.

Mohamed Abdul Basith, Tariq B. Ahmad, André Rossi, Maciej J. Ciesielski

Proceedings of the International Conference on Formal Methods in Computer-Aided Design, 2011