Tasuku Fujibe

According to our database, Tasuku Fujibe authored at least 6 papers between 2009 and 2016.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2016

An optical/electrical test system for 100Gb/s optical interconnection devices with high volume testing capability.

Tasuku Fujibe, Kazuki Shirahata, Takeshi Mizushima, Hidenobu Matsumura, Daisuke Watanabe, Hiroyuki Mineo, Shin Masuda

Proceedings of the 21th IEEE European Test Symposium, 2016

An Optical Interconnection Test Method Applicable to 100-Gb/s Transceivers Using an ATE Based Hardware.

Kazuki Shirahata, Takeshi Mizushima, Tasuku Fujibe, Hidenobu Matsumura, Tomoyuki Itakura, Masahiro Ishida, Daisuke Watanabe, Shin Masuda

Proceedings of the 25th IEEE Asian Test Symposium, 2016

An Optical/Electrical Test System for 100-Gb/s Optical Interconnection Devices for High Volume Production.

Takeshi Mizushima, Kazuki Shirahata, Tasuku Fujibe, Hidenobu Matsumura, Daisuke Watanabe, Hiroyuki Mineo, Shin Masuda

Proceedings of the 25th IEEE Asian Test Symposium, 2016

2012

Real-Time Testing Method for Multilevel Signal Interfaces and Its Impact on Test Cost.

Masahiro Ishida, Kiyotaka Ichiyama, Tasuku Fujibe, Daisuke Watanabe, Masayuki Kawabata

IEEE Des. Test Comput., 2012

8Gbps CMOS pin electronics hardware macro with simultaneous bi-directional capability.

Shoji Kojima, Yasuyuki Arai, Tasuku Fujibe, Tsuyoshi Ataka, Atsushi Ono, Ken-ichi Sawada, Daisuke Watanabe

Proceedings of the 2012 IEEE International Test Conference, 2012

2009

Dynamic arbitrary jitter injection method for ≫6.5Gb/s SerDes testing.

Tasuku Fujibe, Masakatsu Suda, Kazuhiro Yamamoto, Yoshihito Nagata, Kazuhiro Fujita, Daisuke Watanabe, Toshiyuki Okayasu

Proceedings of the 2009 IEEE International Test Conference, 2009