Teruyoshi Hatanaka

According to our database, Teruyoshi Hatanaka authored at least 6 papers between 2010 and 2012.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2012

NAND Controller System With Channel Number Detection and Feedback for Power-Efficient High-Speed 3D-SSD.

Teruyoshi Hatanaka, Ken Takeuchi

IEEE J. Solid State Circuits, 2012

Initialize and Weak-Program Erasing Scheme for High-Performance and High-Reliability Ferroelectric NAND Flash Solid-State Drive.

Kousuke Miyaji, Ryoji Yajima, Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai, Ken Takeuchi

IEICE Trans. Electron., 2012

Highly reliable, high speed and low power NAND flash memory-based Solid State Drives (SSDs).

Ken Takeuchi, Teruyoshi Hatanaka, Shuhei Tanakamaru

IEICE Electron. Express, 2012

2011

Improvement of Read Disturb, Program Disturb and Data Retention by Memory Cell <i>V</i>_TH Optimization of Ferroelectric (Fe)-NAND Flash Memories for Highly Reliable and Low Power Enterprise Solid-State Drives (SSDs).

Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai, Ken Takeuchi

IEICE Trans. Electron., 2011

A 3D-Integration method to compensate output voltage degradation of boost converter for compact Solid-State-Drives.

Teruyoshi Hatanaka, Koh Johguchi, Ken Takeuchi

Proceedings of the 2011 IEEE International 3D Systems Integration Conference (3DIC), Osaka, Japan, January 31, 2011

2010

Ferroelectric (Fe)-NAND Flash Memory With Batch Write Algorithm and Smart Data Store to the Nonvolatile Page Buffer for Data Center Application High-Speed and Highly Reliable Enterprise Solid-State Drives.

Teruyoshi Hatanaka, Ryoji Yajima, Takeshi Horiuchi, Shouyu Wang, Xizhen Zhang, Mitsue Takahashi, Shigeki Sakai, Ken Takeuchi

IEEE J. Solid State Circuits, 2010