Kousuke Miyaji

According to our database1, Kousuke Miyaji authored at least 18 papers between 2010 and 2019.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2019
A CMOS Integrated Sweat Monitoring System for Medical Applications.
Proceedings of the 2nd International Symposium on Devices, Circuits and Systems, 2019

A wide conversion ratio, 92.8% efficiency, 3-level buck converter with adaptive on/off-time control and shared charge pump intermediate voltage regulator.
Proceedings of the 24th Asia and South Pacific Design Automation Conference, 2019

2018
A 92.8% Efficiency Adaptive-On/Off-Time Control 3-Level Buck Converter for Wide Conversion Ratio with Shared Charge Pump Intermediate Voltage Regulator.
Proceedings of the 2018 IEEE Symposium on VLSI Circuits, 2018

2017
A 13.56MHz CMOS active diode full-wave rectifier achieving ZVS with voltage-time-conversion delay-locked loop for wireless power transmission.
Proceedings of the 22nd Asia and South Pacific Design Automation Conference, 2017

2015
A ZVS CMOS active diode rectifier with voltage-time-conversion delay-locked loop for wireless power transmission.
Proceedings of the IEEE Asian Solid-State Circuits Conference, 2015

2014
A High Performance and Energy-Efficient Cold Data Eviction Algorithm for 3D-TSV Hybrid ReRAM/MLC NAND SSD.
IEEE Trans. Circuits Syst. I Regul. Pap., 2014

A Temperature Tracking Read Reference Current and Write Voltage Generator for Multi-Level Phase Change Memories.
IEICE Trans. Electron., 2014

2013
A 6T-SRAM With a Post-Process Electron Injection Scheme That Pinpoints and Simultaneously Repairs Disturb Fails for 57% Less Read Delay and 31% Less Read Energy.
IEEE J. Solid State Circuits, 2013

Development of a system for location finding of low-level sound source by using human acoustic system with stochastic resonance.
Proceedings of the 2013 IEEE/SICE International Symposium on System Integration, 2013

Over 10-times high-speed, energy efficient 3D TSV-integrated hybrid ReRAM/MLC NAND SSD by intelligent data fragmentation suppression.
Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012
Near Threshold Voltage Word-Line Voltage Injection Self-Convergence Scheme for Local Electron Injected Asymmetric Pass Gate Transistor 6T-SRAM.
IEEE Trans. Circuits Syst. I Regul. Pap., 2012

Initialize and Weak-Program Erasing Scheme for High-Performance and High-Reliability Ferroelectric NAND Flash Solid-State Drive.
IEICE Trans. Electron., 2012

Analysis of Operation Margin and Read Speed in 6T- and 8T-SRAM with Local Electron Injected Asymmetric Pass Gate Transistor.
IEICE Trans. Electron., 2012

x11 performance increase, x6.9 endurance enhancement, 93% energy reduction of 3D TSV-integrated hybrid ReRAM/MLC NAND SSDs by data fragmentation suppression.
Proceedings of the Symposium on VLSI Circuits, 2012

A 6T SRAM with a carrier-injection scheme to pinpoint and repair fails that achieves 57% faster read and 31% lower read energy.
Proceedings of the 2012 IEEE International Solid-State Circuits Conference, 2012

2011
Improvement of Read Margin and Its Distribution by V<sub>TH</sub> Mismatch Self-Repair in 6T-SRAM With Asymmetric Pass Gate Transistor Formed by Post-Process Local Electron Injection.
IEEE J. Solid State Circuits, 2011

Statistical VTH shift variation self-convergence scheme using near threshold VWL injection for local electron injected asymmetric pass gate transistor SRAM.
Proceedings of the 2011 IEEE Custom Integrated Circuits Conference, 2011

2010
Elimination of half select disturb in 8T-SRAM by local injected electron asymmetric pass gate transistor.
Proceedings of the IEEE Custom Integrated Circuits Conference, 2010


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