Thara Rejimon

According to our database, Thara Rejimon authored at least 6 papers between 2005 and 2009.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of four.

2009

Probabilistic Error Modeling for Nano-Domain Logic Circuits.

Thara Rejimon, Karthikeyan Lingasubramanian, Sanjukta Bhanja

IEEE Trans. Very Large Scale Integr. Syst., 2009

2006

Reliability-centric probabilistic analysis of VLSI circuits.

Thara Rejimon

PhD thesis, 2006

A Timing-Aware Probabilistic Model for Single-Event-Upset Analysis.

Thara Rejimon, Sanjukta Bhanja

IEEE Trans. Very Large Scale Integr. Syst., 2006

Wide Limited Switch Dynamic Logic Circuit Implementations.

Thara Rejimon, Sanjukta Bhanja

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

A Stimulus-Free Probabilistic Model for Single-Event-Upset Sensitivity.

Thara Rejimon, Sanjukta Bhanja

Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005

An Accurate Probalistic Model for Error Detection.

Thara Rejimon, Sanjukta Bhanja

Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005