Thara Rejimon

According to our database1, Thara Rejimon authored at least 5 papers between 2005 and 2009.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2009
Probabilistic Error Modeling for Nano-Domain Logic Circuits.
IEEE Trans. Very Large Scale Integr. Syst., 2009

2006
Reliability-centric probabilistic analysis of VLSI circuits.
PhD thesis, 2006

A Timing-Aware Probabilistic Model for Single-Event-Upset Analysis.
IEEE Trans. Very Large Scale Integr. Syst., 2006

Wide Limited Switch Dynamic Logic Circuit Implementations.
Proceedings of the 19th International Conference on VLSI Design (VLSI Design 2006), 2006

2005
An Accurate Probalistic Model for Error Detection.
Proceedings of the 18th International Conference on VLSI Design (VLSI Design 2005), 2005


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