Tomasz Talaska
Orcid: 0000-0001-7252-8013
According to our database1,
Tomasz Talaska
authored at least 43 papers
between 2006 and 2024.
Collaborative distances:
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Bibliography
2024
Modelling and simulations in time-fractional electrodynamics based on control engineering methods.
Commun. Nonlinear Sci. Numer. Simul., February, 2024
2023
A novel hardware implemented programmable controller adapted to cooperate with AI tuning algorithms in real time systems.
J. Comput. Appl. Math., August, 2023
A novel, flexible circuit used to implement selected mathematical operations for AI algorithms optimized for hardware applications.
J. Comput. Appl. Math., August, 2023
Comput. Biol. Chem., June, 2023
A new deterministic PSO algorithm for real-time systems implemented on low-power devices.
J. Comput. Appl. Math., 2023
Detection of Unoccupied Areas of the Road in Images from Mono Camera with Use of Multilevel Image Decomposition.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023
Solutions for Creating Virtual Tracks for Autonomous Vehicles, Based on Vehicle-to-Infrastructure Technology.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023
Proceedings of the 16th International Conference on Signal Processing and Communication System, 2023
2022
Air Pollution Monitoring System with Prediction Abilities Based on Smart Autonomous Sensors Equipped with ANNs with Novel Training Scheme.
Remote. Sens., 2022
2021
A Novel, Low Computational Complexity, Parallel Swarm Algorithm for Application in Low-Energy Devices.
Sensors, 2021
2020
Hardware Efficient Solutions for Wireless Air Pollution Sensors Dedicated to Dense Urban Areas.
Remote. Sens., 2020
New technologies for smart cities - high-resolution air pollution maps based on intelligent sensors.
Concurr. Comput. Pract. Exp., 2020
Modified Particle Swarm Optimization Algorithm Facilitating Its Hardware Implementation.
Proceedings of the 27th International Conference on Mixed Design of Integrated Circuits and System, 2020
Low Hardware Complexity Filters for On-Chip Algorithm Used in Air Pollution Sensors for Dense Urban Areas in Smart Cities.
Proceedings of the 27th International Conference on Mixed Design of Integrated Circuits and System, 2020
2019
Adv. Comput. Math., 2019
A Low Power, Low Chip Area, Two-stage Current-mode DAC Implemented in CMOS 130 nm Technology.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
2018
Components of Artificial Neural Networks Realized in CMOS Technology to be Used in Intelligent Sensors in Wireless Sensor Networks.
Sensors, 2018
Analog, parallel, sorting circuit for the application in Neural Gas learning algorithm implemented in the CMOS technology.
Appl. Math. Comput., 2018
Efficient methods of initializing neuron weights in self-organizing networks implemented in hardware.
Appl. Math. Comput., 2018
Parallel, Asynchronous Winner Selection Circuit for Hardware Implemented Self-Organizing Maps.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018
Low Power, Low Chip Area, Programmable PID Controller Realized in the CMOS Technology.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018
Novel Solutions for Smart Cities - Creating Air Pollution Maps Based on Intelligent Sensors.
Proceedings of the 2018 Federated Conference on Computer Science and Information Systems, 2018
2017
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017
A serial distance calculation circuit for the application in artificial neural networks and pattern recognition.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017
Efficient transistor level implementation of selected fuzzy logic operators used in control systems.
Proceedings of the Trends in Advanced Intelligent Control, Optimization and Automation - Proceedings of KKA 2017, 2017
2016
Analog Programmable Distance Calculation Circuit for Winner Takes All Neural Network Realized in the CMOS Technology.
IEEE Trans. Neural Networks Learn. Syst., 2016
A 10-phases programmable clock generator for the application in control of SAR ADC realized in the CMOS 130 nm technology.
Proceedings of the 2016 MIXDES, 2016
2015
An efficient initialization mechanism of neurons for Winner Takes All Neural Network implemented in the CMOS technology.
Appl. Math. Comput., 2015
A novel recursive algorithm used to model hardware programmable neighborhood mechanism of self-organizing neural networks.
Appl. Math. Comput., 2015
Analog sorting circuit for the application in self-organizing neural networks based on neural gas learning algorithm.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015
2014
An Optimized Learning Algorithm Based on Linear Filters Suitable for Hardware implemented Self-Organizing Maps.
Proceedings of the 22th European Symposium on Artificial Neural Networks, 2014
2013
An optimized algorithm for recognition of complex patterns based on artificial neural network.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
2012
Low-Power Manhattan Distance Calculation Circuit for Self-Organizing Neural Networks Implemented in the CMOS Technology.
Proceedings of the 20th European Symposium on Artificial Neural Networks, 2012
2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011
2010
Realization of the conscience mechanism in CMOS implementation of winner-takes-all self-organizing neural networks.
IEEE Trans. Neural Networks, 2010
Microelectron. J., 2010
2008
Proceedings of the 16th European Symposium on Artificial Neural Networks, 2008
2007
Adaptive Weight Change Mechanism for Kohonens's Neural Network Implemented in CMOS 0.18 um Technology.
Proceedings of the 15th European Symposium on Artificial Neural Networks, 2007
2006
Analog-Counter-Based Conscience Mechanism in Kohonen's Neural Network Implemented in CMOS 0.18 m Technology.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
0.35 m 22W Multiphase Programmable Clock Generator for Circular Memory SC FIR Filter For Wireless Sensor Applications.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006