Rafal Dlugosz
Orcid: 0000-0002-9153-5072
According to our database1,
Rafal Dlugosz
authored at least 72 papers
between 2005 and 2023.
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Bibliography
2023
A novel hardware implemented programmable controller adapted to cooperate with AI tuning algorithms in real time systems.
J. Comput. Appl. Math., August, 2023
A novel, flexible circuit used to implement selected mathematical operations for AI algorithms optimized for hardware applications.
J. Comput. Appl. Math., August, 2023
A novel approach to cities' assessment in terms of their implementation of smart city idea.
J. Comput. Appl. Math., August, 2023
A new deterministic PSO algorithm for real-time systems implemented on low-power devices.
J. Comput. Appl. Math., 2023
A Binary-Directional Shape Descriptor for the Enhancement of Real-Time Automatic Headlight Control Function.
IEEE Access, 2023
Analog, Programmable Switched Capacitor FIR Filter Based on Rotator Architecture Implemented in CMOS Technology.
Proceedings of the Signal Processing: Algorithms, 2023
Detection of Unoccupied Areas of the Road in Images from Mono Camera with Use of Multilevel Image Decomposition.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023
Solutions for Creating Virtual Tracks for Autonomous Vehicles, Based on Vehicle-to-Infrastructure Technology.
Proceedings of the 30th International Conference on Mixed Design of Integrated Circuits and System, 2023
2022
Air Pollution Monitoring System with Prediction Abilities Based on Smart Autonomous Sensors Equipped with ANNs with Novel Training Scheme.
Remote. Sens., 2022
2021
A Novel, Low Computational Complexity, Parallel Swarm Algorithm for Application in Low-Energy Devices.
Sensors, 2021
2020
Hardware Efficient Solutions for Wireless Air Pollution Sensors Dedicated to Dense Urban Areas.
Remote. Sens., 2020
New technologies for smart cities - high-resolution air pollution maps based on intelligent sensors.
Concurr. Comput. Pract. Exp., 2020
Proceedings of the Signal Processing: Algorithms, 2020
Modified Particle Swarm Optimization Algorithm Facilitating Its Hardware Implementation.
Proceedings of the 27th International Conference on Mixed Design of Integrated Circuits and System, 2020
Low Hardware Complexity Filters for On-Chip Algorithm Used in Air Pollution Sensors for Dense Urban Areas in Smart Cities.
Proceedings of the 27th International Conference on Mixed Design of Integrated Circuits and System, 2020
2019
Calculation of descriptive statistics by devices with low computational resources for use in calibration of V2I system.
Proceedings of the 24th International Conference on Methods and Models in Automation and Robotics, 2019
Static Camera Calibration for Advanced Driver Assistance System Used in Trucks - Robust Detector of Calibration Points.
Proceedings of the 24th International Conference on Methods and Models in Automation and Robotics, 2019
Proceedings of the 24th International Conference on Methods and Models in Automation and Robotics, 2019
Techniques to Facilitate the Use of V2I Communication System as Support for Traffic Sign Recognition Algorithms.
Proceedings of the 24th International Conference on Methods and Models in Automation and Robotics, 2019
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
A Low Power, Low Chip Area, Two-stage Current-mode DAC Implemented in CMOS 130 nm Technology.
Proceedings of the 26th International Conference on Mixed Design of Integrated Circuits and Systems, 2019
Positioning Improving of RSU Devices Used in V2I Communication in Intelligent Transportation System.
Proceedings of the Preprints of Communication Papers of the 2019 Federated Conference on Computer Science and Information Systems, 2019
Solutions for Planning Smart Hybrid Public Transportation System - Poznan Agglomeration as a Case Study of Satellite Towns' Connections.
Proceedings of the Preprints of Communication Papers of the 2019 Federated Conference on Computer Science and Information Systems, 2019
2018
Analog, parallel, sorting circuit for the application in Neural Gas learning algorithm implemented in the CMOS technology.
Appl. Math. Comput., 2018
Efficient methods of initializing neuron weights in self-organizing networks implemented in hardware.
Appl. Math. Comput., 2018
Programmable, switched-capacitor finite impulse response filter realized in CMOS technology for education purposes.
Proceedings of the Signal Processing: Algorithms, 2018
Parallel, Asynchronous Winner Selection Circuit for Hardware Implemented Self-Organizing Maps.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018
Low Power, Low Chip Area, Programmable PID Controller Realized in the CMOS Technology.
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018
Proceedings of the 25th International Conference "Mixed Design of Integrated Circuits and System", 2018
Novel Solutions for Smart Cities - Creating Air Pollution Maps Based on Intelligent Sensors.
Proceedings of the 2018 Federated Conference on Computer Science and Information Systems, 2018
2017
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017
A serial distance calculation circuit for the application in artificial neural networks and pattern recognition.
Proceedings of the 24th International Conference Mixed Design of Integrated Circuits and Systems, 2017
Efficient transistor level implementation of selected fuzzy logic operators used in control systems.
Proceedings of the Trends in Advanced Intelligent Control, Optimization and Automation - Proceedings of KKA 2017, 2017
2016
Analog Programmable Distance Calculation Circuit for Winner Takes All Neural Network Realized in the CMOS Technology.
IEEE Trans. Neural Networks Learn. Syst., 2016
A 10-phases programmable clock generator for the application in control of SAR ADC realized in the CMOS 130 nm technology.
Proceedings of the 2016 MIXDES, 2016
2015
An efficient initialization mechanism of neurons for Winner Takes All Neural Network implemented in the CMOS technology.
Appl. Math. Comput., 2015
A novel recursive algorithm used to model hardware programmable neighborhood mechanism of self-organizing neural networks.
Appl. Math. Comput., 2015
Analog sorting circuit for the application in self-organizing neural networks based on neural gas learning algorithm.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015
An advanced software model for optimization of self-organizing neural networks oriented on implementation in hardware.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015
Low chip area, low power dissipation, programmable, current mode, 10-bits, SAR ADC implemented in the CMOS 130nm technology.
Proceedings of the 22nd International Conference Mixed Design of Integrated Circuits & Systems, 2015
Problem of efficient initialization of large Self-Organizing Maps implemented in the CMOS technology.
Proceedings of the 2nd IEEE International Conference on Cybernetics, 2015
2014
An Optimized Learning Algorithm Based on Linear Filters Suitable for Hardware implemented Self-Organizing Maps.
Proceedings of the 22th European Symposium on Artificial Neural Networks, 2014
2013
An optimized algorithm for recognition of complex patterns based on artificial neural network.
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
Proceedings of the 20th International Conference Mixed Design of Integrated Circuits and Systems, 2013
2012
A programmable triangular neighborhood function for a Kohonen self-organizing map implemented on chip.
Neural Networks, 2012
Low-Power Manhattan Distance Calculation Circuit for Self-Organizing Neural Networks Implemented in the CMOS Technology.
Proceedings of the 20th European Symposium on Artificial Neural Networks, 2012
Proceedings of the 20th European Symposium on Artificial Neural Networks, 2012
2011
Parallel Programmable Asynchronous Neighborhood Mechanism for Kohonen SOM Implemented in CMOS Technology.
IEEE Trans. Neural Networks, 2011
IEEE Trans. Circuits Syst. II Express Briefs, 2011
Power efficient asynchronous multiplexer for X-ray sensors in medical imaging analog front-end electronics.
Microelectron. J., 2011
Proceedings of the 19th European Symposium on Artificial Neural Networks, 2011
2010
Realization of the conscience mechanism in CMOS implementation of winner-takes-all self-organizing neural networks.
IEEE Trans. Neural Networks, 2010
Microelectron. J., 2010
Neurocomputing, 2010
Programmable triangular neighborhood functions of Kohonen Self-Organizing Maps realized in CMOS technology.
Proceedings of the 18th European Symposium on Artificial Neural Networks, 2010
2009
Programmable Switched Capacitor Finite Impulse Response Filter with Circular Memory Implemented in CMOS 0.18 µm Technology.
J. Signal Process. Syst., 2009
Hardware Implementation Issues of the Neighborhood Mechanism in Kohonen Self Organized Feature Maps.
Proceedings of the 17th European Symposium on Artificial Neural Networks, 2009
New Fast Training Algorithm Suitable for Hardware Kohonen Neural Networks Designed for Analysis of Biomedical Signals.
Proceedings of the BIODEVICES 2009, 2009
An Asynchronous Programmable Parallel 2-D Image Filter CMOS Ic Based on the Gilbert Vector Multiplier.
Proceedings of the BIODEVICES 2009, 2009
2008
Power and area efficient circular-memory switched-capacitor FIR baseband filter for WCDMA/GSM.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Current-mode memory cell with power down phase for discrete time analog iterative decoders.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2008), 2008
Proceedings of the 16th European Symposium on Artificial Neural Networks, 2008
Parallel asynchronous neighborhood mechanism for WTM Kohonen network implemented in CMOS technology.
Proceedings of the 16th European Symposium on Artificial Neural Networks, 2008
2007
Flexible Architecture of Ultra-Low-Power Current-Mode Interleaved Successive Approximation Analog-to-Digital Converter for Wireless Sensor Networks.
VLSI Design, 2007
Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007
Adaptive Weight Change Mechanism for Kohonens's Neural Network Implemented in CMOS 0.18 um Technology.
Proceedings of the 15th European Symposium on Artificial Neural Networks, 2007
2006
Integrated CMOS GSM baseband channel selecting filters realized using switched capacitor finite impulse response technique.
Microelectron. Reliab., 2006
Analog-Counter-Based Conscience Mechanism in Kohonen's Neural Network Implemented in CMOS 0.18 m Technology.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
0.35 m 22W Multiphase Programmable Clock Generator for Circular Memory SC FIR Filter For Wireless Sensor Applications.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
An Examination of the Effect of Feature Size Scaling on Effective Power Consumption in Analog to Digital Converters.
Proceedings of the IEEE Workshop on Signal Processing Systems, 2006
2005
3.125 Gb/s power efficient line driver with 2-level pre-emphasis and 2 kV HBM ESD protection.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005
Proceedings of the 2005 European Conference on Circuit Theory and Design, 2005