Trong-Yen Lee

According to our database1, Trong-Yen Lee authored at least 60 papers between 1997 and 2022.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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Links

On csauthors.net:

Bibliography

2022
Construction and Implementation of Wireless Network Online Learning System Based on Edge Computing.
Int. J. Emerg. Technol. Learn., November, 2022

A Design and Application of Municipal Service Platform Based on Cloud-Edge Collaboration for Smart Cities.
Sensors, 2022

2021
High Efficiency Disease Detection for Potato Leaf with Convolutional Neural Network.
SN Comput. Sci., 2021

Next-Generation Electronics and Sensing Technology.
Sensors, 2021

Smart Cities in China: A Brief Overview.
IT Prof., 2021

2020
Design of a FlexRay/Ethernet Gateway and Security Mechanism for In-Vehicle Networks.
Sensors, 2020

2019
A Comprehensive Teaching Reform Model for a Computer Networks Course Based on Integrated Information Systems.
Int. J. Emerg. Technol. Learn., 2019

Personalized ACC System for Smart Vehicles.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2019

2018
A Reliability Scheduling Algorithm for the Static Segment of FlexRay on Vehicle Networks.
Sensors, 2018

2017
High performance CAN/FlexRay gateway design for in-vehicle network.
Proceedings of the IEEE Conference on Dependable and Secure Computing, 2017

2016
A low-area dynamic reconfigurable MDC FFT processor design.
Microprocess. Microsystems, 2016

Adaptive instruction codec architecture design for network-on-chip.
Comput. Electr. Eng., 2016

2015
Power-saving dynamic allocati on strategy for clouding server.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2015

2014
Design of Smart Power-Saving Architecture for Network on Chip.
VLSI Design, 2014

Design of Low-Complexity 4-Path Dynamic Reconfigurable MDC FFT Processor.
Proceedings of the Intelligent Systems and Applications, 2014

Energy-saving LED control module for agent-based Micro-Grid systems.
Proceedings of the IEEE International Conference on Consumer Electronics - Taiwan, 2014

2013
Low Complexity Digit-Serial Multiplier over GF(2^m) Using Karatsuba Technology.
Proceedings of the Seventh International Conference on Complex, 2013

An Efficient Task Placement Method for Reconfigurable FPGA Systems.
Proceedings of the Seventh International Conference on Complex, 2013

2012
Discharge-path-based antenna effect detection and fixing for X-architecture clock tree.
Integr., 2012

Microcontroller based automatic parking system.
Proceedings of the International Conference on Machine Learning and Cybernetics, 2012

An Efficient Reconfigurable Architecture Design and Implementation of Image Contrast Enhancement Algorithm.
Proceedings of the 14th IEEE International Conference on High Performance Computing and Communication & 9th IEEE International Conference on Embedded Software and Systems, 2012

Micro fuel cell power management circuit design for portable devices.
Proceedings of the 9th International Conference on Fuzzy Systems and Knowledge Discovery, 2012

2011
The RF Circuit Design of Power and Data Contactless Transmission for ISO/IEC 14443-2 Type B.
J. Circuits Syst. Comput., 2011

Pattern-matching-based X-architecture zero-skew clock tree construction with X-Flip technique and via delay consideration.
Integr., 2011

Post-Routing Double-Via Insertion for X-Architecture Clock Tree Yield Improvement.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2011

2010
Hardware Context-Switch Methodology for Dynamically Partially Reconfigurable Systems.
J. Inf. Sci. Eng., 2010

Antenna Violation Avoidance/Fixing for X-clock routing.
Proceedings of the 11th International Symposium on Quality of Electronic Design (ISQED 2010), 2010

Double-via insertion enhanced X-architecture clock routing for reliability.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2010), May 30, 2010

2009
The Design of a Li-ion Battery Charger Based on Multimode LDO Technology.
J. Circuits Syst. Comput., 2009

A Bisection-Based Power Reduction Design for CMOS Flash Analog-to-Digital converters.
J. Circuits Syst. Comput., 2009

Maximal Delay Reduction for RLC-Based Multi-Source Multi-Sink Bus with Repeater Insertion.
Circuits Syst. Signal Process., 2009

2008
GDME: Grey Relational Clustering Applied to a Clock Tree Construction with Zero Skew and Minimal Delay.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2008

X-clock routing based on pattern matching.
Proceedings of the 21st Annual IEEE International SoC Conference, SoCC 2008, 2008

Layer assignment considering manufacturability in X-architecture clock tree.
Proceedings of 8th IEEE International Conference on Computer and Information Technology, 2008

2007
Zero-Skew Driven Buffered RLC Clock Tree Construction.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci., 2007

An Efficiently Hardware-Software Partitioning for Embedded Multiprocessor FPGA Systems.
Proceedings of the International MultiConference of Engineers and Computer Scientists 2007, 2007

Enhancement of Hardware-Software Partition for Embedded Multiprocessor FPGA Systems.
Proceedings of the 3rd International Conference on Intelligent Information Hiding and Multimedia Signal Processing (IIH-MSP 2007), 2007

2006
Using Stack Reconstruction on RTL Orthogonal Scan Chain Design.
J. Inf. Sci. Eng., 2006

Coupling aware RLC-based clock routings for crosstalk minimization.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

A single chip image sensor embedded smooth spatial filter with A/D conversion.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2006), 2006

Reduction of RLC Tree Delay Using Bidirectional Buffer Repeater Insertion.
Proceedings of the First International Conference on Innovative Computing, Information and Control (ICICIC 2006), 30 August, 2006

Tapping Point Numerical-Based Search for Exact Zero-Skew RLC Clock Tree Construction.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

Propagation Delay Minimization on RLC-Based Bus with Repeater Insertion.
Proceedings of the IEEE Asia Pacific Conference on Circuits and Systems 2006, 2006

2005
SESAG: an object-oriented application framework for real-time systems.
Softw. Pract. Exp., 2005

A new low-power turbo decoder using HDA-DHDD stopping iteration.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

A new CCII-based pipelined analog to digital converter.
Proceedings of the International Symposium on Circuits and Systems (ISCAS 2005), 2005

Zero-Skew Driven for RLC Clock Tree Construction in SoC.
Proceedings of the Third International Conference on Information Technology and Applications (ICITA 2005), 2005

2004
VERTAF: An Application Framework for the Design and Verification of Embedded Real-Time Software.
IEEE Trans. Software Eng., 2004

Embedded software synthesis and prototyping.
IEEE Trans. Consumer Electron., 2004

RCGES: Retargetable Code Generation for Embedded Systems.
Proceedings of the Automated Technology for Verification and Analysis: Second International Conference, 2004

2003
Software Platform for Embedded Software Development.
Proceedings of the Real-Time and Embedded Computing Systems and Applications, 2003

RESS: Real-Time Embedded Software Synthesis and Prototyping Methodology.
Proceedings of the Real-Time and Embedded Computing Systems and Applications, 2003

Quasi-Dynamic Scheduling for the Synthesis of Real-Time Embedded Software with Local and Global Deadlines.
Proceedings of the Real-Time and Embedded Computing Systems and Applications, 2003

2002
VERTAF: An Object-Oriented Application Framework for Embedded Real-Time Systems.
Proceedings of the 5th International Symposiun on Object Oriented Real-Time Distributed Computing, 2002

TCN: Scalable Hierarchical Hypercubes.
Proceedings of the 9th International Conference on Parallel and Distributed Systems, 2002

Formal Synthesis and Code Generation of Real-Time Embedded Software using Time-Extended Quasi-Static Scheduling.
Proceedings of the 9th Asia-Pacific Software Engineering Conference (APSEC 2002), 2002

2001
Formal Verification of Embedded Real-Time Software in Component-Based Application Frameworks.
Proceedings of the 8th Asia-Pacific Software Engineering Conference (APSEC 2001), 2001

1999
A Case Study in Hardware-Software Codesign of Distributed Systems - Vehicle Parking Management System.
Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications, 1999

1998
ICOS: an intelligent concurrent object-oriented synthesis methodology for multiprocessor systems.
ACM Trans. Design Autom. Electr. Syst., 1998

1997
Object-Oriented Technology Transfer to Multiprocessor System-Level Synthesis.
Proceedings of the TOOLS 1997: 24th International Conference on Technology of Object-Oriented Languages and Systems, 1997


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