Tun Li

According to our database, Tun Li authored at least 54 papers between 2003 and 2023.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2023

A Diffusion Model for Multimessage Multidimensional Complex Game Based on Rumor and Anti-Rumor.

Yunpeng Xiao, Wenbo Yuan, Xiangtao Yue, Tun Li, Qian Li

IEEE Trans. Comput. Soc. Syst., October, 2023

A malware propagation prediction model based on representation learning and graph convolutional networks.

Tun Li, Yanbing Liu, Qilie Liu, Wei Xu, Yunpeng Xiao, Hong Liu

Digit. Commun. Networks, October, 2023

Diffusion Pixelation: A Game Diffusion Model of Rumor & Anti-Rumor Inspired by Image Restoration.

Yunpeng Xiao, Zhen Huang, Qian Li, Xingyu Lu, Tun Li

IEEE Trans. Knowl. Data Eng., May, 2023

Towards Accelerating Assertion Coverage Using Surrogate Logic Models.

Tun Li, Mingchuan Shi, Hongji Zou, Wanxia Qu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2023

ESFO: Equality Saturation for FIRRTL Optimization.

Yan Pi, Hongji Zou, Tun Li, Wanxia Qu, Hai Wan

Proceedings of the Great Lakes Symposium on VLSI 2023, 2023

MMFuzz: Towards Enhancing RTL Fuzz Testing Using Metric Feedbacks Based on Markov Chain.

Yue Cheng, Hongji Zou, Jiayu He, Chen Chen, Tun Li, Han Long

Proceedings of the 32nd IEEE Asian Test Symposium, 2023

2022

Recommendation Model Based on Dynamic Interest Group Identification and Data Compensation.

Xingyu Lu, Jun Liu, Shengli Gan, Tun Li, Yunpeng Xiao, Yanbing Liu

IEEE Trans. Netw. Serv. Manag., 2022

Grammar-based fuzz testing for microprocessor RTL design.

Dan Luo, Tun Li, Liqian Chen, Hongji Zou, Mingchuan Shi

Integr., 2022

ICS-SVM: A user retweet prediction method for hot topics based on improved SVM.

Tianji Dai, Yunpeng Xiao, Xia Liang, Qian Li, Tun Li

Digit. Commun. Networks, 2022

Towards Implementing RTL Microprocessor Agile Design Using Feature Oriented Programming.

Hongji Zou, Mingchuan Shi, Tun Li, WanXia Qu

Proceedings of the 2022 Design, Automation & Test in Europe Conference & Exhibition, 2022

2021

Symbolic Simulation Enhanced Coverage-Directed Fuzz Testing of RTL Design.

Tun Li, Hongji Zou, Dan Luo, WanXia Qu

Proceedings of the IEEE International Symposium on Circuits and Systems, 2021

On Enhancing Application-Ability Training in Discrete Mathematics.

Tun Li, Wanwei Liu, Liqian Chen, Xiaoguang Mao

Proceedings of the IEEE Frontiers in Education Conference, 2021

Rectified Multi-class AdaBoost for Noisy Dataset Based on Weight Adjustment Standard.

Keke Hu, Wanwei Liu, Tun Li

Proceedings of the ASSE 2021: 2nd Asia Service Sciences and Software Engineering Conference, 2021

2020

Edge Computing and Blockchain for Quick Fake News Detection in IoV.

Yonggang Xiao, Yanbing Liu, Tun Li

Sensors, 2020

Towards functional verifying a family of systemC TLMs.

Tun Li, Jun Ye, Qingping Tan

Frontiers Comput. Sci., 2020

Software testing without the oracle correctness assumption.

Tun Li, Wanwei Liu, Xinrui Guo, Ji Wang

Frontiers Comput. Sci., 2020

Attack plan recognition using hidden Markov and probabilistic inference.

Tun Li, Yutian Liu, Yanbing Liu, Yunpeng Xiao, Nguyen Nang An

Comput. Secur., 2020

Compiling FL^res on Finite Words.

Wanwei Liu, Liangze Yin, Tun Li

Proceedings of the Dependable Software Engineering. Theories, Tools, and Applications, 2020

2019

Formal Equivalence Checking Between System-Level and RTL Descriptions without Pre-Given Mapping Information.

Jian Hu, Tun Li, Sikun Li

J. Circuits Syst. Comput., 2019

2016

Equivalence checking between SLM and RTL using machine learning techniques.

Jian Hu, Tun Li, Sikun Li

Proceedings of the 17th International Symposium on Quality Electronic Design, 2016

2015

Equivalence checking between SLM and TLM using coverage directed simulation.

Jian Hu, Tun Li, Sikun Li

Frontiers Comput. Sci., 2015

Formal equivalence checking between SLM and RTL descriptions.

Jian Hu, Tun Li, Sikun Li

Proceedings of the 28th IEEE International System-on-Chip Conference, 2015

Equivalence checking of scheduling in high-level synthesis.

Tun Li, Jian Hu, Yang Guo, Sikun Li, QingPing Tan

Proceedings of the Sixteenth International Symposium on Quality Electronic Design, 2015

2013

Bounded Model Checking of ETL Cooperating with Finite and Looping Automata Connectives.

Rui Wang, Wanwei Liu, Tun Li, Xiaoguang Mao, Ji Wang

J. Appl. Math., 2013

Introduction to programming: science or art?

Tun Li, Wanwei Liu, Xiaoguang Mao, Huiping Zhou

Proceedings of the Innovation and Technology in Computer Science Education conference 2013, 2013

Efficient translation validation of high-level synthesis.

Tun Li, Yang Guo, Wanwei Liu, Chiyuan Ma

Proceedings of the International Symposium on Quality Electronic Design, 2013

Translation validation of scheduling in high level synthesis.

Tun Li, Yang Guo, Wanwei Liu, Mingsheng Tang

Proceedings of the Great Lakes Symposium on VLSI 2013 (part of ECRC), 2013

Application specified soft error failure rate analysis using sequential equivalence checking techniques.

Tun Li, Dan Zhu, Sikun Li, Yang Guo

Proceedings of the 18th Asia and South Pacific Design Automation Conference, 2013

2012

A bio-inspired self-organizing approach for multicellular embryonic architecture.

Jiaqing Xu, Qi Lv, Tun Li, Yong Dou

Proceedings of the 2012 NASA/ESA Conference on Adaptive Hardware and Systems, 2012

2011

Separation of communication and computation in SystemC/TLM modeling: A Feature-Oriented approach.

Jun Ye, QingPing Tan, Tun Li

Proceedings of the 12th International Symposium on Quality Electronic Design, 2011

FeatureVerilog: Extending Verilog to Support Feature-Oriented Programming.

Jun Ye, Qingping Tan, Tun Li, GuoRong Cao

Proceedings of the 25th IEEE International Symposium on Parallel and Distributed Processing, 2011

2010

Feature-Oriented Refactoring Proposal for Transaction Level Models in SoCLib.

Jun Ye, QingPing Tan, Tun Li, Bin Wu, Yuanru Meng

Proceedings of the 2010 Forum on specification & Design Languages, 2010

An Approximate Soft Error Reliability Sorting Approach Based on State Analysis of Sequential Circuits.

Dan Zhu, Tun Li, Sikun Li

Proceedings of the 25th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems, 2010

On Soft Error Immunity of Sequential Circuits.

Dan Zhu, Tun Li, Sikun Li

Proceedings of the 19th IEEE Asian Test Symposium, 2010

2009

The application of Aspectual Feature Module in the development and verification of SystemC models.

Jun Ye, Tun Li, QingPing Tan

Proceedings of the Forum on specification and Design Languages, 2009

2008

2D Decomposition Sequential Equivalence Checking of System Level and RTL Descriptions.

Dan Zhu, Tun Li, Yang Guo, Sikun Li

Proceedings of the 9th International Symposium on Quality of Electronic Design (ISQED 2008), 2008

Explicit Model Checking Based on Integer Pointer and Fibonacci Hash.

WanXia Qu, Tun Li, Yang Guo, Xiaodong Yang

Proceedings of the 9th International Conference for Young Computer Scientists, 2008

2007

Experiences Teaching Functional Verification Techniques with Practical Designs.

Tun Li, Yang Guo, Sikun Li, Wei Dong, Rangyu Deng

Proceedings of the IEEE International Conference on Microelectronic Systems Education, 2007

Fast Panorama Unrolling of Catadioptric Omni-Directional Images for Cooperative Robot Vision System.

Zhihui Xiong, Maojun Zhang, Yunli Wang, Tun Li, Sikun Li

Proceedings of the 11th International Conference on Computer Supported Cooperative Work in Design, 2007

Distributed Collaborative Partition Method of Reconfigurable SoC Using Ant Colony Optimization.

Sikun Li, Dawei Wang, Tun Li, Yong Dou

Proceedings of the 11th International Conference on Computer Supported Cooperative Work in Design, 2007

A Novel Collaborative Verification Environment for SoC Co-Verification.

Tun Li, Sikun Li, Jinshan Yu, Yang Guo

Proceedings of the 11th International Conference on Computer Supported Cooperative Work in Design, 2007

Coverage Driven Test Generation Framework for RTL Functional Verification.

Yang Guo, WanXia Qu, Tun Li, Sikun Li

Proceedings of the 10th International Conference on Computer-Aided Design and Computer Graphics, 2007

2006

Scheduling of Transactions Based on Extended Scheduling Timed Petri Nets for SoC System-Level Test-Case Generation.

Jinshan Yu, Tun Li, Yang Guo, QingPing Tan

Proceedings of the Embedded and Ubiquitous Computing, International Conference, 2006

2005

Applying Constraint Logic Programming to Predicate Abstraction of RTL Verilog Descriptions.

Tun Li, Yang Guo, Sikun Li, Dan Zhu

Proceedings of the MICAI 2005: Advances in Artificial Intelligence, 2005

MA2TG: A Functional Test Program Generator for Microprocessor Verification.

Tun Li, Dan Zhu, Yang Guo, GongJie Liu, Sikun Li

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Functional Vectors Generation for RT-Level Verilog Descriptions Based on Path Enumeration and Constraint Logic Programming.

Tun Li, Yang Guo, GongJie Liu, Sikun Li

Proceedings of the Eighth Euromicro Symposium on Digital Systems Design (DSD 2005), 30 August, 2005

Predicate Abstraction of RTL Verilog Descriptions Using Constraint Logic Programming.

Tun Li, Yang Guo, Sikun Li, GongJie Liu

Proceedings of the Automated Technology for Verification and Analysis, 2005

Automatic functional test program generation for microprocessor verification.

Tun Li, Dan Zhu, Lei Liang, Yang Guo, Sikun Li

Proceedings of the 2005 Conference on Asia South Pacific Design Automation, 2005

2004

Automatic Circuit Extractor for HDL Description Using Program Slicing.

Tun Li, Yang Guo, Sikun Li

J. Comput. Sci. Technol., 2004

Design and Implementation of a Parallel Verilog Simulator: PVSim.

Tun Li, Yang Guo, Sikun Li

Proceedings of the 17th International Conference on VLSI Design (VLSI Design 2004), 2004

Assertion-based automated functional vectors generation using constraint logic programming.

Tun Li, Yang Guo, Sikun Li

Proceedings of the 14th ACM Great Lakes Symposium on VLSI 2004, 2004

CLP Based Static Property Checking.

Tun Li, Yang Guo, Sikun Li

Proceedings of the Automated Technology for Verification and Analysis: Second International Conference, 2004

Parallel verilog simulation: architecture and circuit partition.

Tun Li, Yang Guo, Sikun Li, Fujiang Ao, Gongjie Li

Proceedings of the 2004 Conference on Asia South Pacific Design Automation: Electronic Design and Solution Fair 2004, 2004

2003

An Automatic Circuit Extractor for RTL Verification.

Tun Li, Yang Guo, Sikun Li

Proceedings of the 12th Asian Test Symposium (ATS 2003), 17-19 November 2003, Xian, China, 2003