Vakkalakula Bharath Sreenivasulu

Orcid: 0009-0004-0182-3057

According to our database1, Vakkalakula Bharath Sreenivasulu authored at least 7 papers between 2024 and 2026.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book  In proceedings  Article  PhD thesis  Dataset  Other 

Links

On csauthors.net:

Bibliography

2026
Vertically Stacked Doping-Less Dual-Metal Gate Nanosheet FET With TiO2 Dielectric for High Sensitivity Autoimmune Disease Biosensing.
IEEE Access, 2026

2025
A CNTFET-Based 10T Static Memory Design Immune to Read and Half-Select Disturbs for Low-Power Wearable Biomedical Systems.
IEEE Access, 2025

Energy-Efficient Buffer-Based Ternary SRAM Cell With Application to Image Processing.
IEEE Access, 2025

Challenges and Advances in Materials and Fabrication Technologies for the Development of p-GaN Gated E-Mode AlGaN/GaN Power HEMTs: A Critical Review.
IEEE Access, 2025

2024
Analysis of Novel Core-Shell Junctionless Nanosheet FET for CMOS Logic Applications.
IEEE Access, 2024

A Novel L<sub>G</sub> = 40 nm AlN-GDC-HEMT on SiC Wafer With f<sub>T</sub>/I<sub>DS,peak</sub> of 400 GHz/3.18 mA/mm for Future RF Power Amplifiers.
IEEE Access, 2024

Performance Improvement of Spacer-Engineered N-Type Tree Shaped NSFET Toward Advanced Technology Nodes.
IEEE Access, 2024


  Loading...