Valeri F. Tomashau

According to our database1, Valeri F. Tomashau authored at least 3 papers between 1999 and 2004.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
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Links

On csauthors.net:

Bibliography

2004
Validation of an Advanced Encryption Standard (AES) IP Core.
Proceedings of the 12th IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2004), 2004

2002
Efficient 4-input LUTs FPGA implementation of combinatorial multiplier over canonical base GF(16).
Proceedings of the 2002 IEEE International Conference on Field-Programmable Technology, 2002

1999
Logic Circuit Speeding up through Multiplexing.
Proceedings of the Field-Programmable Logic and Applications, 9th International Workshop, 1999


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