Van-Lan Dao

Orcid: 0000-0001-8109-1685

According to our database1, Van-Lan Dao authored at least 14 papers between 2016 and 2024.

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Bibliography

2024
Dealing With Jamming Attacks in Uplink Pairwise NOMA Using Outage Analysis, Smart Relaying, and Redundant Transmissions.
IEEE Open J. Commun. Soc., 2024

2023
Defeating Jamming Attacks in Downlink Pairwise NOMA Using Relaying.
Proceedings of the 34th IEEE Annual International Symposium on Personal, 2023

Scheduling Firm Real-time Applications on the Edge with Single-bit Execution Time Prediction.
Proceedings of the 26th IEEE International Symposium on Real-Time Distributed Computing, 2023

Outage Performance Comparison of Adaptive Relaying Schemes Subject to Jamming.
Proceedings of the 28th IEEE International Conference on Emerging Technologies and Factory Automation, 2023

2022
Anomaly Attack Detection in Wireless Networks Using DCNN.
Proceedings of the 8th IEEE World Forum on Internet of Things, 2022

Deep Neural Network for Indoor Positioning Based on Channel Impulse Response.
Proceedings of the 27th IEEE International Conference on Emerging Technologies and Factory Automation, 2022

2021
Defeating Jamming Using Outage Performance Aware Joint Power Allocation and Access Point Placement in Uplink Pairwise NOMA.
IEEE Open J. Commun. Soc., 2021

2020
On Communication Performance in Energy Harvesting WSNs Under a Cooperative Jamming Attack.
IEEE Syst. J., 2020

Outage Performance of Pairwise NOMA Allowing a Dynamic Decoding Order and Optimal Pairs of Power Levels.
IEEE Open J. Commun. Soc., 2020

Enabling Fog-based Industrial Robotics Systems.
Proceedings of the 25th IEEE International Conference on Emerging Technologies and Factory Automation, 2020

2019
Reliability and Fairness for UAV Communication Based on Non-Orthogonal Multiple Access.
Proceedings of the 17th IEEE International Conference on Communications Workshops, 2019

2016
A compact, ultra-low power AES-CCM IP core for wireless body area networks.
Proceedings of the 2016 IFIP/IEEE International Conference on Very Large Scale Integration, 2016

An ultra-low power AES encryption core in 65nm SOTB CMOS process.
Proceedings of the International SoC Design Conference, 2016

A compact, low power AES core on 180nm CMOS process.
Proceedings of the International Conference on IC Design and Technology, 2016


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