Victor Goulart

According to our database1, Victor Goulart authored at least 9 papers between 2011 and 2017.

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Bibliography

2017
Diagonal-based fast intra-mode decision algorithm for HEVC.
IET Image Process., 2017

Real-time unified architecture for forward/inverse discrete cosine transform in high efficiency video coding.
IET Circuits Devices Syst., 2017

2016
Scalable Integer DCT Architecture for HEVC Encoder.
Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2016

2014
Hierarchical Network Coding for Collective Communication on HPC Interconnects.
Proceedings of the 22nd Euromicro International Conference on Parallel, 2014

2013
Hardware implementation and evaluation of the Flexible router architecture for NoCs.
Proceedings of the 20th IEEE International Conference on Electronics, 2013

High Performance Bitwise OR Based Submesh Allocation for 2D Mesh-Connected CMPs.
Proceedings of the 2013 Euromicro Conference on Digital System Design, 2013

2012
Flexible router architecture for network-on-chip.
Comput. Math. Appl., 2012

Intermediate nodes selection schemes for Network Coding in Network-on-Chips.
Proceedings of the NORCHIP 2012, Copenhagen, Denmark, November 12-13, 2012, 2012

2011
Faster Processor Allocation Algorithms for Mesh-Connected CMPs.
Proceedings of the 14th Euromicro Conference on Digital System Design, 2011


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