Vijay K. Raj

According to our database1, Vijay K. Raj authored at least 7 papers between 1984 and 1995.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

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PhD thesis 
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Links

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Bibliography

1995
An Efficient Algorithm-Based Concurrent Error Detection for FFT Networks.
IEEE Trans. Computers, 1995

1994
A distributed controller for system level integration.
Proceedings of the Fourth Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1994

1993
Algorithm-Based Concurrent Error Detection for FFT Networks.
Proceedings of the Sixth International Conference on VLSI Design, 1993

Optimal register allocation in high level synthesis.
Proceedings of the Third Great Lakes Symposium on Design Automation of High Performance VLSI Systems, 1993

1989
DAGAR: an automatic pipelined microarchitecture synthesis system.
Proceedings of the Computer Design: VLSI in Computers and Processors, 1989

1985
Translating Data Flow Graphs to Architectures
PhD thesis, 1985

1984
Microprocessor synthesis.
Proceedings of the 21st Design Automation Conference, 1984


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