Vijay R. Sar-Dessai

According to our database1, Vijay R. Sar-Dessai authored at least 2 papers between 1998 and 1999.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

1999
Resistive bridge fault modeling, simulation and test generation.
Proceedings of the Proceedings IEEE International Test Conference 1999, 1999

1998
Accurate Fault Modeling and Fault Simulation of Resistive Bridges.
Proceedings of the 13th International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT '98), 1998


  Loading...