Vincent Mirian

According to our database1, Vincent Mirian authored at least 10 papers between 2009 and 2017.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

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PhD thesis 
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Links

On csauthors.net:

Bibliography

2017
Enabling FPGAs as a True Device in the OpenCL Standard: Bridging the Gap for FPGAs.
Proceedings of the 5th International Workshop on OpenCL, 2017

2016
Extracting Designs of Secure IPs Using FPGA CAD Tools.
Proceedings of the 26th edition on Great Lakes Symposium on VLSI, 2016

2015
UT-OCL: an OpenCL framework for embedded systems using xilinx FPGAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Evaluating shared virtual memory in an OpenCL framework for embedded systems on FPGAs.
Proceedings of the International Conference on ReConFigurable Computing and FPGAs, 2015

Exploring pipe implementations using an OpenCL framework for FPGAs.
Proceedings of the 2015 International Conference on Field Programmable Technology, 2015

2014
Using an OpenCL framework to evaluate interconnect implementations on FPGAs.
Proceedings of the 24th International Conference on Field Programmable Logic and Applications, 2014

2012
An implementation of a directory protocol for a cache coherent system on FPGAs.
Proceedings of the 2012 International Conference on Reconfigurable Computing and FPGAs, 2012

Managing mutex variables in a cache-coherent shared-memory system for FPGAs.
Proceedings of the 2012 International Conference on Field-Programmable Technology, 2012

FCache: a system for cache coherent processing on FPGAs.
Proceedings of the ACM/SIGDA 20th International Symposium on Field Programmable Gate Arrays, 2012

2009
Matrix Multiplication Based on Scalable Macro-Pipelined FPGA Accelerator Architecture.
Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009


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