Zuocheng Xing

According to our database, Zuocheng Xing authored at least 60 papers between 2006 and 2022.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of four.

2022

Automatic Modulation Classification for MASK, MPSK, and MQAM Signals Based on Hierarchical Self-Organizing Map.

Zerun Li, Qinglin Wang, Yufei Zhu, Zuocheng Xing

Sensors, 2022

2021

High Area-Efficient Parallel Encoder with Compatible Architecture for 5G LDPC Codes.

Yufei Zhu, Zuocheng Xing, Zerun Li, Yang Zhang, Yifan Hu

Symmetry, 2021

Low latency group-sorted QR decomposition algorithm for larger-scale MIMO systems.

Lirui Chen, Yu Wang, Zuocheng Xing, Shikai Qiu, Qinglin Wang, Yongzhong Li

IET Commun., 2021

Area-Efficient Parallel Reconfigurable Stream Processor for Symmetric Cryptograph.

Yufei Zhu, Zuocheng Xing, Jinhui Xue, Zerun Li, Yifan Hu, Yang Zhang, Yongzhong Li

IEEE Access, 2021

A Noc Centric Low Overhead Multi-chip Interconnection Technology.

Xing Hu, Yang Zhang, Li Mao, Jie Shen, Zuocheng Xing

Proceedings of the 2021 IEEE 23rd Int Conf on High Performance Computing & Communications; 7th Int Conf on Data Science & Systems; 19th Int Conf on Smart City; 7th Int Conf on Dependability in Sensor, 2021

2020

Practical AMC model based on SAE with various optimisation methods under different noise environments.

Zerun Li, Qinglin Wang, Weisong Liu, Qiang Xu, Zuocheng Xing, Yongzhong Li

IET Commun., 2020

An Area-Efficient Hybrid Polar Decoder With Pipelined Architecture.

Yu Wang, Qinglin Wang, Yang Zhang, Shikai Qiu, Zuocheng Xing

IEEE Access, 2020

Efficient MIMO Preprocessor With Sorting-Relaxed QR Decomposition and Modified Greedy LLL Algorithm.

Lirui Chen, Zuocheng Xing, Yongzhong Li, Shikai Qiu

IEEE Access, 2020

A Paralleled Greedy LLL Algorithm for 16×16 MIMO Detection.

Lirui Chen, Yu Wang, Zuocheng Xing, Shikai Qiu, Qinglin Wang, Yang Zhang

Proceedings of the IEEE International Symposium on Circuits and Systems, 2020

A Low-Latency Successive Cancellation Hybrid Decoder for Convolutional Polar Codes.

Yu Wang, Shikai Qiu, Lirui Chen, Qinglin Wang, Yang Zhang, Cang Liu, Zuocheng Xing

Proceedings of the 2020 IEEE International Conference on Acoustics, 2020

2019

An Improved Concatenation Scheme of BCH-Polar Codes With Low-Latency Decoding Architecture.

Yu Wang, Lirui Chen, Cang Liu, Zuocheng Xing

IEEE Access, 2019

Algorithm and Architecture for Path Metric Aided Bit-Flipping Decoding of Polar Codes.

Yu Wang, Lirui Chen, Qinglin Wang, Yang Zhang, Zuocheng Xing

Proceedings of the 2019 IEEE Wireless Communications and Networking Conference, 2019

Optimization Methods for Computing System in Mobile CPS.

Yang Zhang, Zuocheng Xing, Yu Wang, Lirui Chen, Qinglin Wang, Yufei Zhu

Proceedings of the 2nd International Conference on Big Data Technologies, 2019

2018

CWLP: coordinated warp scheduling and locality-protected cache allocation on GPUs.

Yang Zhang, Zuocheng Xing, Cang Liu, Chuan Tang

Frontiers Inf. Technol. Electron. Eng., 2018

Locality-protected cache allocation scheme with low overhead on GPUs.

Yang Zhang, Zuocheng Xing, Chuan Tang, Cang Liu

IET Comput. Digit. Tech., 2018

Locality based warp scheduling in GPGPUs.

Yang Zhang, Zuocheng Xing, Cang Liu, Chuan Tang, Qinglin Wang

Future Gener. Comput. Syst., 2018

2017

A Flexible Divide-and-Conquer MPSoC Architecture for MIMO Interference Cancellation.

Luechao Yuan, Cang Liu, Chuan Tang, Shan Huang, Anupam Chattopadhyay, Gerd Ascheid, Zuocheng Xing

IEEE Trans. Very Large Scale Integr. Syst., 2017

Hardware Architecture Based on Parallel Tiled QRD Algorithm for Future MIMO Systems.

Cang Liu, Chuan Tang, Zuocheng Xing, Luechao Yuan, Yang Zhang

IEEE Trans. Very Large Scale Integr. Syst., 2017

A Novel Architecture to Eliminate Bottlenecks in a Parallel Tiled QRD Algorithm for Future MIMO Systems.

Cang Liu, Zuocheng Xing, Luechao Yuan, Chuan Tang, Yang Zhang

IEEE Trans. Circuits Syst. II Express Briefs, 2017

Approximate iteration detection with iterative refinement in massive MIMO systems.

Chuan Tang, Cang Liu, Luechao Yuan, Zuocheng Xing

IET Commun., 2017

Low latency QRD algorithm for future communication.

Lirui Chen, Cang Liu, Yu Wang, Zuocheng Xing, Yang Zhang, Jing Liu

IEICE Electron. Express, 2017

2016

QR decomposition architecture using the iteration look-ahead modified Gram-Schmidt algorithm.

Cang Liu, Chuan Tang, Luechao Yuan, Zuocheng Xing, Yang Zhang

IET Circuits Devices Syst., 2016

High Precision Low Complexity Matrix Inversion Based on Newton Iteration for Data Detection in the Massive MIMO.

Chuan Tang, Cang Liu, Luechao Yuan, Zuocheng Xing

IEEE Commun. Lett., 2016

QRD Architecture Using the Modified ILMGS Algorithm for MIMO Systems.

Cang Liu, Chuan Tang, Zuocheng Xing, Luechao Yuan, Yu Wang, Lirui Chen, Yang Zhang, Suncheng Xiang, Wangfeng Zhao, Xing Hu, Jinsong Xu

Proceedings of the Wireless Internet - 9th International Conference, 2016

Locality Protected Dynamic Cache Allocation Scheme on GPUs.

Yang Zhang, Zuocheng Xing, Li Zhou, Chunsheng Zhu

Proceedings of the 2016 IEEE Trustcom/BigDataSE/ISPA, 2016

An Architecture of Parallel Tiled QRD Algorithm for MIMO-OFDM Systems.

Cang Liu, Chuan Tang, Zuocheng Xing, Lirui Chen, Yang Zhang, Guitao Fu

Proceedings of the 2016 IEEE Trustcom/BigDataSE/ISPA, 2016

Optimization of Two Bottleneck Programs in SAR System on GPGPU.

Yang Zhang, Zuocheng Xing, Cang Liu, Chuan Tang, Lirui Chen, Qinglin Wang

Proceedings of the Computer Engineering and Technology - 20th CCF Conference, 2016

Hardware design of ML algorithm in MIMO-OFDM system.

Suncheng Xiang, Minxuan Zhang, Zuocheng Xing, Cang Liu

Proceedings of the 3rd International Conference on Systems and Informatics, 2016

2015

Applying partial power-gating to bit-sliced network-on-chip.

Feng Wang, Xiantuo Tang, Zuocheng Xing

Microelectron. J., 2015

Applying Partial Power-Gating to Direction-Sliced Network-on-Chip.

Feng Wang, Xiantuo Tang, Zuocheng Xing

J. Electr. Comput. Eng., 2015

Accelerating FDTD simulation of microwave pulse coupling into narrow slots on the Intel MIC architecture.

Qinglin Wang, Jie Liu, Xiantao Cui, Guitao Fu, Chunye Gong, Zuocheng Xing

Proceedings of the IEEE Pacific Rim Conference on Communications, 2015

Channel Estimation in Massive MIMO: Algorithm and Hardware.

Chuan Tang, Cang Liu, Luechao Yuan, Zuocheng Xing

Proceedings of the Computer Engineering and Technology - 19th CCF Conference, 2015

A ML-Based High-Accuracy Estimation of Sampling and Carrier Frequency Offsets for OFDM Systems.

Cang Liu, Luechao Yuan, Zuocheng Xing, Xiantuo Tang, Guitao Fu

Proceedings of the Computer Engineering and Technology - 19th CCF Conference, 2015

A GPU-based Fast Solution for Riesz Space Fractional Reaction-Diffusion Equation.

Qinglin Wang, Jie Liu, Chunye Gong, Yang Zhang, Zuocheng Xing

Proceedings of the 18th International Conference on Network-Based Information Systems, 2015

Memory Access Analysis of Many-core System with Abundant Bandwidth.

Chuan Tang, Dan Liu, Zuocheng Xing, Peng Yang, Zhe Wang, Jiang Xu

Proceedings of the IEEE 9th International Symposium on Embedded Multicore/Many-core Systems-on-Chip, 2015

DIPP - An LLC Replacement Policy for On-chip Dynamic Heterogeneous Multi-core Architecture.

Yang Zhang, Zuocheng Xing, Xiao Ma

Proceedings of the Intelligent Computation in Big Data Era, 2015

A flexible low-complexity robust THP approach for MISO downlinks with imperfect CSI.

Luechao Yuan, Gaojiang Wang, Gerd Ascheid, Cang Liu, Zuocheng Xing

Proceedings of the 2015 IEEE/CIC International Conference on Communications in China, 2015

UniMESH: The light-weight unidirectional channel Network-on-Chip in 2D mesh topology.

Feng Wang, Xiantuo Tang, Zuocheng Xing, Hengzhu Liu

Proceedings of the 25. International Conference on Electronics, 2015

2014

The acceleration of turbo decoder on the newest GPGPU of Kepler architecture.

Yang Zhang, Zuocheng Xing, Luechao Yuan, Cang Liu, Qinglin Wang

Proceedings of the 14th International Symposium on Communications and Information Technologies, 2014

Parallel 3D deterministic particle transport on Intel MIC architecture.

Qinglin Wang, Zuocheng Xing, Jie Liu, Xiaogang Qiang, Chunye Gong, Jiang Jiang

Proceedings of the International Conference on High Performance Computing & Simulation, 2014

Flexible Virtual Channel Power-Gating for High-Throughput and Low-Power Network-on-Chip.

Feng Wang, Xiantuo Tang, Qinglin Wang, Zuocheng Xing, Hengzhu Liu

Proceedings of the 17th Euromicro Conference on Digital System Design, 2014

2013

Addressing Transient and Permanent Faults in NoC With Efficient Fault-Tolerant Deflection Router.

Chaochao Feng, Zhonghai Lu, Axel Jantsch, Minxuan Zhang, Zuocheng Xing

IEEE Trans. Very Large Scale Integr. Syst., 2013

Architecture and Implementation of a Reduced EPIC Processor.

Jun Gao, Minxuan Zhang, Zuocheng Xing, Chaochao Feng

IEICE Trans. Inf. Syst., 2013

Reconfigurable pseudo-NMOS-like logic with hybrid MOS and single-electron transistors.

Xiaobao Chen, Zuocheng Xing, Bingcai Sui, Shi-Ce Ni

IEICE Electron. Express, 2013

An Optimizing Strategy Research of LDPC Decoding Based on GPGPU.

Luechao Yuan, Zuocheng Xing, Yang Zhang, Xiaobao Chen

Proceedings of the 12th IEEE International Conference on Trust, 2013

Backhaul-Route Pre-Configuration Mechanism for Delay Optimization in NoCs.

Xiantuo Tang, Feng Wang, Zuocheng Xing, Qinglin Wang

Proceedings of the Computer Engineering and Technology - 17th CCF Conference, 2013

A Full Adder Based on Hybrid Single-Electron Transistors and MOSFETs at Room Temperature.

Xiaobao Chen, Zuocheng Xing, Bingcai Sui

Proceedings of the Computer Engineering and Technology - 17th CCF Conference, 2013

Tunable Negative Differential Resistance of Single-Electron Transistor Controlled by Capacitance.

Xiaobao Chen, Zuocheng Xing, Bingcai Sui

Proceedings of the Computer Engineering and Technology - 17th CCF Conference, 2013

2012

Validation and analysis of negative differential resistance of single-electron transistor with conductance model.

Xiaobao Chen, Zuocheng Xing, Bingcai Sui

Proceedings of the 19th IEEE International Conference on Electronics, Circuits and Systems, 2012

2011

Accurate and Simplified Prediction of AVF for Delay and Energy Efficient Cache Design.

Anguo Ma, Yu Cheng, Zuocheng Xing

J. Comput. Sci. Technol., 2011

Design and Evaluation of Traffic Filter for Token Protocol.

Guitao Fu, Zuocheng Xing, Tianlei Zhao, Xiantuo Tang

Proceedings of the Sixth International Symposium on Parallel Computing in Electrical Engineering (PARELEC 2011), 2011

Characterizing Time-Varying Behavior and Predictability of Cache AVF.

Yu Cheng, Yongwen Wang, Zuocheng Xing, Minxuan Zhang

Proceedings of the 2011 Third International Conference on Intelligent Networking and Collaborative Systems (INCoS), Fukuoka, Japan, November 30, 2011

A model for energy quantization of single-electron transistor below 10nm.

Xiaobao Chen, Zuocheng Xing, Bingcai Sui

Proceedings of the 2011 IEEE 9th International Conference on ASIC, 2011

2010

A Delay Model of Two-Cycle NoC Router in 2D-Mesh Network.

Shubo Qi, Jinwen Li, Zuocheng Xing, Xiaomin Jia, Minxuan Zhang

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2010

2009

Fei Teng 64 Stream Processing System: Architecture, Compiler, and Programming.

Xuejun Yang, Xiaobo Yan, Zuocheng Xing, Yu Deng, Jiang Jiang, Jing Du, Ying Zhang

IEEE Trans. Parallel Distributed Syst., 2009

Matrix Multiplication Based on Scalable Macro-Pipelined FPGA Accelerator Architecture.

Jiang Jiang, Vincent Mirian, Kam Pui Tang, Paul Chow, Zuocheng Xing

Proceedings of the ReConFig'09: 2009 International Conference on Reconfigurable Computing and FPGAs, 2009

Design of Testing Struture in Microprocessor Based on JTAG.

Ping Zhang, Yanmin Song, Jianmin Zhang, Zuocheng Xing

Proceedings of the 2009 Second International Symposium on Computational Intelligence and Design, 2009

Performance Optimization Strategies of High Performance Computing on GPU.

Anguo Ma, Jing Cai, Yu Cheng, Xiaoqiang Ni, Yuxing Tang, Zuocheng Xing

Proceedings of the Advanced Parallel Processing Technologies, 8th International Symposium, 2009

2007

A 64-bit stream processor architecture for scientific applications.

Xuejun Yang, Xiaobo Yan, Zuocheng Xing, Yu Deng, Jiang Jiang, Ying Zhang

Proceedings of the 34th International Symposium on Computer Architecture (ISCA 2007), 2007

2006

An Architectural Leakage Power Reduction Method for Instruction Cache in Ultra Deep Submicron Microprocessors.

Chengyi Zhang, Hongwei Zhou, Minxuan Zhang, Zuocheng Xing

Proceedings of the Advances in Computer Systems Architecture, 11th Asia-Pacific Conference, 2006