Vinitha Arakkonam Palaniveloo

According to our database, Vinitha Arakkonam Palaniveloo authored at least 4 papers between 2011 and 2014.

Collaborative distances:

• Dijkstra number of four.
• Erdős number of five.

2014

System level modeling and verification of NoC components using model checking.

Vinitha Arakkonam Palaniveloo

PhD thesis, 2014

Improving GA-Based NoC Mapping Algorithms Using a Formal Model.

Vinitha Arakkonam Palaniveloo, Jude Angelo Ambrose, Arcot Sowmya

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2014

2012

Formal Estimation of Worst-Case Communication Latency in a Network-on-Chip.

Vinitha Arakkonam Palaniveloo, Arcot Sowmya

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2012

2011

Application of Formal Methods for System-Level Verification of Network on Chip.

Vinitha Arakkonam Palaniveloo, Arcot Sowmya

Proceedings of the IEEE Computer Society Annual Symposium on VLSI, 2011