Vipin Singh
Orcid: 0009-0008-8924-0970Affiliations:
- National Institute of Technology Jote, Integrated Circuit System Lab, India
- Indian Institute of Technology Delhi, Department of Electrical Engineering, New Delhi, India (former)
According to our database1,
Vipin Singh authored at least 10 papers
between 2023 and 2026.
Collaborative distances:
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Bibliography
2026
A Zeta-Luo Integrated Dual Output Bridgeless Rectifier Fed SRM Drive With Improved Power Quality.
IEEE Trans. Ind. Electron., January, 2026
Circuits Syst. Signal Process., January, 2026
A Model-Driven Approach to Variable-Frequency Clock Synthesis for PSN-Resilient IC Wake-Up.
Proceedings of the 29th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems, 2026
2025
Circuits Syst. Signal Process., December, 2025
A Control for Preventing False Tripping of Grid-Tied Renewable Systems With Increased Solar Penetration and Fluctuating Load Demand.
IEEE Trans. Ind. Electron., April, 2025
Proceedings of the International Conference on Electronics, Information, and Communication, 2025
2024
Proceedings of the IEEE International Symposium on Smart Electronic Systems, 2024
2023
Comparative Exploration of Gate Count and Leakage Optimized D-Latch in Nanometer CMOS.
Proceedings of the 33rd International Conference Radioelektronika, 2023
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023
αβ-MDSC-MFLL Control with Positive Sequence Extraction and DC Offset Rejection for a Grid-Tied Solar PV-BES Based Power Conversion System.
Proceedings of the 49th Annual Conference of the IEEE Industrial Electronics Society, 2023