Vivek Govindasamy

According to our database, Vivek Govindasamy authored at least 5 papers between 2022 and 2026.

Collaborative distances:

• Dijkstra number of five.
• Erdős number of five.

2026

Mixed-Level Modeling and Evaluation of a Cache-less Grid of Processing Cells.

Vivek Govindasamy, Rainer Dömer

ACM Trans. Embed. Comput. Syst., March, 2026

2025

A Quantitative Guide to Navigate Speed/Accuracy Tradeoffs in System Level Design of RISC-V Processor Grids.

Lars Luchterhandt, Vivek Govindasamy, Yutong Wang, Christoph Scheytt, Wolfgang Müller, Rainer Dömer

Proceedings of the Forum on Specification & Design Languages, 2025

2024

BusyMap, an Efficient Data Structure to Observe Interconnect Contention in SystemC TLM-2.0.

Emad Malekzadeh Arasteh, Vivek Govindasamy, Rainer Dömer

Proceedings of the Design, Automation & Test in Europe Conference & Exhibition, 2024

2023

Instruction-Level Modeling and Evaluation of a Cache-Less Grid of Processing Cells.

Vivek Govindasamy, Rainer Dömer

Proceedings of the Forum on Specification & Design Languages, 2023

2022

Minimizing Memory Contention in an APNG Encoder Using a Grid of Processing Cells.

Vivek Govindasamy, Emad Malekzadeh Arasteh, Rainer Dömer

Proceedings of the Designing Modern Embedded Systems: Software, Hardware, and Applications, 2022