Vladimir Kiriansky

According to our database1, Vladimir Kiriansky authored at least 12 papers between 2002 and 2019.

Collaborative distances:
  • Dijkstra number2 of four.
  • Erdős number3 of four.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Other 

Links

On csauthors.net:

Bibliography

2019
Improving performance and security of indirect memory references on speculative execution machines.
PhD thesis, 2019

2018
DAWG: A Defense Against Cache Timing Attacks in Speculative Execution Processors.
IACR Cryptol. ePrint Arch., 2018

Speculative Buffer Overflows: Attacks and Defenses.
CoRR, 2018

Cimple: Instruction and Memory Level Parallelism.
CoRR, 2018

Cimple: instruction and memory level parallelism: a DSL for uncovering ILP and MLP.
Proceedings of the 27th International Conference on Parallel Architectures and Compilation Techniques, 2018

2017
Making caches work for graph analytics.
Proceedings of the 2017 IEEE International Conference on Big Data, BigData 2017, 2017

2016
Optimizing Cache Performance for Graph Analytics.
CoRR, 2016

Optimizing Indirect Memory References with milk.
Proceedings of the 2016 International Conference on Parallel Architectures and Compilation, 2016

2011
Performance Evaluation of HPC Benchmarks on VMware's ESXi Server.
Proceedings of the Euro-Par 2011: Parallel Processing Workshops - CCPI, CGWS, HeteroPar, HiBB, HPCVirt, HPPC, HPSS, MDGS, ProPer, Resilience, UCHPC, VHPC, Bordeaux, France, August 29, 2011

2008
Process-shared and persistent code caches.
Proceedings of the 4th International Conference on Virtual Execution Environments, 2008

2006
Thread-Shared Software Code Caches.
Proceedings of the Fourth IEEE/ACM International Symposium on Code Generation and Optimization (CGO 2006), 2006

2002
Secure Execution via Program Shepherding.
Proceedings of the 11th USENIX Security Symposium, 2002


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