Vlado Vorisek

According to our database1, Vlado Vorisek authored at least 5 papers between 2001 and 2014.

Collaborative distances:
  • Dijkstra number2 of five.
  • Erdős number3 of five.

Timeline

Legend:

Book 
In proceedings 
Article 
PhD thesis 
Dataset
Other 

Links

On csauthors.net:

Bibliography

2014
Analysis of cell-aware test pattern effectiveness - A case study using a 32-bit automotive microcontroller.
Proceedings of the 19th IEEE European Test Symposium, 2014

2006
Improved Handling of False and Multicycle Paths in ATPG.
Proceedings of the 24th IEEE VLSI Test Symposium (VTS 2006), 30 April, 2006

2004
At-Speed Testing of SOC ICs.
Proceedings of the 2004 Design, 2004

2002
Design integration, DFT, and verification methodology for an MPEG 1/2 audio layer 3 (MP3) SoC device.
Proceedings of the IEEE 2002 Custom Integrated Circuits Conference, 2002

2001
Test Pattern Generators for Distributed and Embedded Built-in Self-Test at Register Transfer Level.
Proceedings of the 2nd International Symposium on Quality of Electronic Design (ISQED 2001), 2001


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